ADC Sampling Time STM32L053C8

[amuehlfeld]

Posted on March 27, 2015 at 18:35

When I configure the ADC sampling time using SMP[2:0] of the ADC_SMPR register, the resulting conversion time (1.5 cycles + sampling time) does not match what I expect. 

RM0367, v2, section 14.13.6 lists the following possible sample time:

1.5, 7.5, 13.5, 28.5, 41.5, 55.5, 71.5, 239.5.

Respectively, my measured results for the sample time are as follows (12.5 cycle conversion time removed)

1.5, 3.5, 7.5, 12.5, 19.5, 39.5, 79.5, 165.5.

Chip is STM32L053C8

While testing the ADC was running from HSI16 with various prescaler values, all producing the same measured values for the sample time cycles.  It is interesting that the measured value matches for the minimum case of 1.5 cycles, and differs for all the others.

Could this be an error in the reference manual, or am I missing something?

Thanks.

[waclawek.jan]

Posted on March 31, 2015 at 00:39

> Respectively, my measured results for the sample time are as follows (12.5 cycle conversion time removed)

How did you measure that?

JW

[amuehlfeld]

Posted on April 01, 2015 at 19:39

I used a function generator to provide a sine wave at a known frequency and recorded a burst of 512 ADC samples using the DMA engine.  Dividing the period of the sine wave by the number of samples over one period of the sine wave gives the sample period (sample time + conversion time).

[waclawek.jan]

Posted on March 04, 2018 at 19:24

I know it's an old thread, but for the benefit of anybody who might come here through searching, this has been corrected in the related bitfield description of the RM - although not in the examples...

https://community.st.com/0D50X00009XkbSBSAZ