4k-Ram connect to a STM32F103VE

[andem2]

Posted on March 12, 2009 at 10:20

4k-Ram connect to a STM32F103VE

[andem2]

Posted on May 17, 2011 at 13:05

I decided to take the STM32F103VE for my Master Work. The STM32F103ZE is too big (BGA144 can not be soldered by hand) and the STM32F103RE has no data or address line on the pinout. Now, I have a big problem, I try to solve this since over two weeks and no one in switzerland could help me yet.

I have to communicate with the ASIC VPC3+C from www.profichip.de. This is a Profibus communicator, that can be seen as a simple 4k-RAM. This RAM can only connected by a parallel bussystem with the following pins:

8 bit Data

12 bit Address (4kb)

1 bit write

1 bit read

1 bit ALE (it is possible to multiplex the lower 8 bit data / address)

The STM32F103VE has now this FSMC-Bus to connect any possible periphery. But I couldn’t find a solution to connect a such simple device like this VPC3+C. If I work with the 8-bit NAND Flash, I can’t reach any address above 8 bit. When I work with the 16-bit NAND Flash, I can’t save the address above 8 because the VPC3+C support just 8 address bit with the ALE (Address Latch Enable). To connect direct 12 address bit and 8 data bit, the STM32F103VE hasn’t enough pins, I guess. And on Wikipedia, I read that NAND-Flash has to be started on a special way. The VPC3+C isn’t a NAND-Flash, but when I connect this device like a NAND-Flash, can this automatic startup at the power on destroy my VPC3+C?

For further information, the datasheet of the VPC3+C is attached.

[jj_it]

Posted on May 17, 2011 at 13:05

My firm often hires/interns those in your position. And - again & again we see this situation! Does it not make more sense to ''pre-confirm'' that everything fits/plays nicely - ''prior'' to committing in concrete?

That said - data-sheet/link is broken. (USA 09-11:00 Sat, 07 Mar)

Re-post and we'll try to help...

[jj_it]

Posted on May 17, 2011 at 13:05

Got the data this time - thanks. Neat chip.

Believe that - while not ''glue-less'' - this will work.

FSMC......VPC

AD0-AD7...DB0-DB7

NADV......ALE (latches 8 lowest Adr bits

NWE.......XWR

NOE.......XRD

Trick is that you must add a latch to derive AB8-AB11. Latch is clocked by NADV - fed with AD8-AD11 - and Q outputs connect to AB8-AB11 of VPC.

You work the detail - believe an HC373 with an inverter between NADV and the latch clock will provide fastest ''set-up.'' (HC374 saves the inverter at the cost of reduced set-up)

Give this a try...

[andem2]

Posted on May 17, 2011 at 13:05

Again the Datasheet, I hope it will work now.

Some examples for the bussystem start at page 75.

[ This message was edited by: andem2 on 08-03-2009 22:30 ]

[jj_it]

Posted on May 17, 2011 at 13:05

ST document 14611, Rev 4, pg 59, Fig 22 clearly shows FSMC_NADV (active low) strobing during the early (address) time of the AD bus. You are correct - you will have to invert NADV prior to feeding it to the VPC.

[ccowdery9]

Posted on May 17, 2011 at 13:05

I used the STM32F103ZET6, which has the entire address and databus available on pins without the need to multiplex buses. It is also hand-solderable because that is how I built my PCBs.

Chris.

[andem2]

Posted on May 17, 2011 at 13:05

You mean I sould work with the NOR Flash, multiplexed mode (NOR/SRAM Mux)? I will try that. Is the NADV low-active? I can't find a good Timing Diagram. If its a low-active signal, I have to invert the ALE of the VPC+3C too.

[andem2]

Posted on May 17, 2011 at 13:05

This 74HCT373 supports only 5V. The 74HC373 is for 3.3V aviable, but is to slow. Has someone a idea for a 4bit D-Latch that runs with 3.3V and is very very fast?