Skip to main content
JZhen.6
Visitor II
June 9, 2021
Question

2 lpuarts can't communicate to each other correctly

  • June 9, 2021
  • 3 replies
  • 772 views

A board with STM32L071CBT6 and another with STM32L476RGT6. The former transmit 18 bytes data {02 6E 9B 3B 41 41 00 00 E7 41 96 83 C9 42 00 03 24 97} to the latter. the latter received {02 6E 9B 3B 41 41 00 00 E7 41 96 83 D9 42 00 03 24 97}, that's the 13th byte is wrong, C9 -> D9. The problem occurs randomly. When these two boards commnicate with PC by CH340, the problem above disappear.

This topic has been closed for replies.

3 replies

TDK
Super User
June 9, 2021

I would look at the signal on a scope to see if edges are okay. Try a different baud rate.

"If you feel a post has answered your question, please click ""Accept as Solution""."
Paul1
Senior III
June 9, 2021
  1. Clock sources? Are you using crystal/resonator, or just STM internal RC oscillators? UART is async (no clock signal) and so requires stable accurate clocks.
  2. If both CPU's on same board, but no crystal/resonator, then you could have one output MCU clock and other input that clock for MCU, then they will stay in sync over RC temperature variations.
  3. If you don't have good clocks, then consider I2C or SPI for inter-processor communication (if on same board, so one provides data clock to other)
  4. With UART over distance ensure use a packet protocol with checksums (or write your own simple one)

Paul

waclawek.jan
Super User
June 9, 2021

While generally TDK and Paul gave clues, I'd guess its this https://community.st.com/s/question/0D53W00000W77UN/stm32l071-mcu-lpuart-use-lse-to-configure-baudrate-9600-actual-baudrate-is-8300-or-11000error-islarge-lse-is-32768khz-one-cycle-is-30517-usone-cycle-of-baudrate-9600-is-34-times-of-lsebut-lse-frequency-division-can-only-be-an-integral-multiple

i.e. 9600baud while clocking from 32.768kHz LSE. This is marginal, and prone exactly to this sort of errors, even if ST gives this as a working combinationi with no warning in the DS/RM. Without changing clock source, the only real soluion is to decrease baudrate (maybe to one, which is "nonstandard" i.e. not the usual 1200/2400/4800/9600, but which results in integer number of periods per bit).

JW