set priority between SPI and UART

[aatif shaikh]

Posted on April 07, 2018 at 15:03

hello everyone!

   I'm currently working on a project, in which I'm mainly using spi [ for MICRO SD CARD and EEPROM communication ],  uart [ GSM communication ] and timer [for certain process management]. my project is based on STM32f103ZET6.

   so far everything works fine but in some cases while reading, writing or initializing the MICRO SD CARD [via SPI] if any interrupt [UART receiver] arrives then my program jump to the

'UART-ISR' 

and because of this action the sequence which I'm following for reading, writing  or initializing the 

MICRO

SD CARD breaks. and after coming back from ISR, SD CARD start giving an unexpected response. as I'm using WATCHDOG timer as well, hence it immediately restarts the controller.

   

   if anyone can explain how can I set priority between SPI and UART [ 1st priority->SPI, 2nd priority->UART ], so that there will be no disturbance while reading, writing or initializing the 

MICRO SD CARD

.

   I've seen as there is an option for setting priority between UARTs, but i could'n find any single document or code regarding setting priority between SPI and UARTs.

Thanks and Regards

Aatif Shaikh 

#stm32f-spi #stm32f-uart ##stm32f #sdio-sd-fatfs

[Tesla DeLorean]

Posted on April 08, 2018 at 00:47

Review the documentation for the NVIC, priority groups, and priority/preemption settings. Joseph Yiu's Essential Cortex-M3/M4 books would be a good start.

Doesn't sound like your SPI is working under interrupt, but rather a foreground task. If this is the case you might want to disable the USART interrupts, or interrupts in general, if the SPI is critical here.

You might want to look at what your USART interrupt is doing, you should perhaps just buffer data quickly and leave, and process the data in a worker task. Consider if you can use DMA for the USART.

STM32Cube_FW_F1_V1.6.1\Drivers\CMSIS\Include\core_cm3.h

/**

  \brief   Set Priority Grouping

  \details Sets the priority grouping field using the required unlock sequence.

           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.

           Only values from 0..7 are used.

           In case of a conflict between priority grouping and available

           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.

  \param [in]      PriorityGroup  Priority grouping field.

 */

__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)

/**

  \brief   Enable External Interrupt

  \details Enables a device-specific interrupt in the NVIC interrupt controller.

  \param [in]      IRQn  External interrupt number. Value cannot be negative.

 */

__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)

/**

  \brief   Disable External Interrupt

  \details Disables a device-specific interrupt in the NVIC interrupt controller.

  \param [in]      IRQn  External interrupt number. Value cannot be negative.

 */

__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)

/**

  \brief   Set Interrupt Priority

  \details Sets the priority of an interrupt.

  \note    The priority cannot be set for every core interrupt.

  \param [in]      IRQn  Interrupt number.

  \param [in]  priority  Priority to set.

 */

__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)