LSE Drive

[JJRR]

Hi,

I have questions about LSE Drive (STM32L0).

1) In RCC register are LSEDRV[1:0] bits and I am not sure if I understand it corretly.

From datasheet about these bits: They are cleared by a power-on reset or an RTC reset. Once “00�? has been written, the content of LSEDRV cannot be changed by software.

It means once I set them to zero then I can not change it in SW again?

2) My crystal has only params like: ESR, DriveLevel (min,max), Cshunt, Cload. How Can I calculate drive level when I do not know nothing about Gmcritical_max, also I do not have current probe to measure current in crystal?

Thank you very much. Jan.

[Bouraoui Chemli · Accepted solution]

Hi,

1) As mentioned in Reference manual RM0377 Rev 10 section 7.2.5 LSE clock, The crystal oscillator driving strength can be changed at runtime through the LSEDRV[1:0]. So, you can change it by software.

I will rise an internal request to remove this note (They are cleared by a power-on reset or an RTC reset. Once “00�? has been written, the content of LSEDRV cannot be changed by software) from reference manual.

2) Please refer to AN2867 "Oscillator design guide for STM8AF/AL/S, STM32 MCUs and MPUs "to calculate gmcrit(crystal) and compare it with Gmcrit_max(MCU). Special focus on sections 3.3 Load capacitance and 3.4 Oscillator transconductance.

Bouraoui