STM32L476 SPI NSS bit not functioning

[ZHama.1]

Using an stm32l476rg nucleo as a master device and SPI2 peripheral. The following bits have been set in order for the NSS bit to stay high normally and then be pulled down during communication (according to the reference manual).

MSTR = 1

SSM = 0

SSOE = 1

SPE = 1 (on button press), 0 (after transmission flag and busy flag is zero

Using a logic analyzer, MOSI and SCLK outputs work correctly and I can read the message off the logic analyzer software but the enable line (NSS bit) is always low no matter what. All GPIO's are configured right, why is this happening?

[waclawek.jan · Accepted solution]

NSS is not controlled by SPI when SPE=0, i.e. it goes threestate. You can use a pullup to, well, pull it up.

JW

[ZHama.1]

Enabled the pin up and it works now, thanks. How comes this is not written anywhere, I've been confused for days.