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All 0x00 in STM32G4 flash? Is it can be recover?

ZYu.1
Associate III

I am testing STLINK Utility's Automatic Mode for mass-production,I set read out protection in option byte from level0 to level1(I have never set it to level2,for its irreversibility),so I just plug in and out the STLINK acting as the operation of mass-production.The times are less than 30(in my memory),but at last I find the flash contents are all 0x00 in flash(starting from 0x08000000,with the legth of the max size of 512K flash).I tried to revise the read out protection to level0(without read out protection),I could see the contents are all 0x00 all the same no matter what I tried,such as full chip erease , page erease or programing new hex file,the flash could not be revise,they are all 0x00.

So anyone can help me? My ST chip is STM32G474E DPOW discovery on board chip,thanks.

0693W000006ICNgQAO.png 

0693W000006ICNlQAO.png0693W000006ICM0QAO.png0693W000006ICOyQAO.png0693W000006ICP3QAO.png

1 ACCEPTED SOLUTION

Accepted Solutions
ZYu.1
Associate III

Now I will share the method how I reset the STM32G4's FLASH BANK RDP:

the firgure below is the BANK RDP falsh statue, it could not be written or ereased,and the contents are all 0x00 when read;​

0693W000007BMToQAO.png​compared the option byte with that of the good chip, we will find the difference is at the bank rdp configuration:

0693W000007BMTtQAO.png​To reset the BANK RDP configuration,we should do the two steps below:

1.check the PCROP_RDP , at the same time set the RDP level from level0(0xAA) to level1(0xBB),according to the PCROP_RDP(Checked :PCROP zone is erased when RDP is decreased), then apply the option byte revisition to make it effective.

0693W000007BMTyQAO.png 

2.then set the RDP level from level1(0xBB) to level0(0xAA),apply the option byte revisition to make it effective.

0693W000007BMU8QAO.png 

at last, we will find the BANK RDP configuration is reset to noraml, the falsh contents are all 0xFF,witch could be written and ereased again.​

0693W000007BMUDQA4.png

0693W000007BMUIQA4.png​ May this page will help you when your falsh contents are all 0x00 without the ability to be written or ereased.

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3 REPLIES 3
ZYu.1
Associate III

I have asked the ST‘s enginerer,the 3v3 power supply of MCU shoulud be Ensured stable during flash ereasing and writing.I decide to replace the chip.

ZYu.1
Associate III

With the mentality of having a try, I compare the option byte of this chip with that of a good chip,I finally find the problem is bank RDP,causing by unstable power supply when program flash and option byte.I will share the method of recovery of the option byte to normal state.

ZYu.1
Associate III

Now I will share the method how I reset the STM32G4's FLASH BANK RDP:

the firgure below is the BANK RDP falsh statue, it could not be written or ereased,and the contents are all 0x00 when read;​

0693W000007BMToQAO.png​compared the option byte with that of the good chip, we will find the difference is at the bank rdp configuration:

0693W000007BMTtQAO.png​To reset the BANK RDP configuration,we should do the two steps below:

1.check the PCROP_RDP , at the same time set the RDP level from level0(0xAA) to level1(0xBB),according to the PCROP_RDP(Checked :PCROP zone is erased when RDP is decreased), then apply the option byte revisition to make it effective.

0693W000007BMTyQAO.png 

2.then set the RDP level from level1(0xBB) to level0(0xAA),apply the option byte revisition to make it effective.

0693W000007BMU8QAO.png 

at last, we will find the BANK RDP configuration is reset to noraml, the falsh contents are all 0xFF,witch could be written and ereased again.​

0693W000007BMUDQA4.png

0693W000007BMUIQA4.png​ May this page will help you when your falsh contents are all 0x00 without the ability to be written or ereased.