cancel
Showing results for 
Search instead for 
Did you mean: 

How to connect with OpenOCD to B-L072Z-LRWAN

MHame.2
Associate II

I'm trying to flash/debug a B-L072Z-LRWAN Discovery kit from Ubuntu 20.04 using openocd, but its failing to connect:

openocd -f interface/stlink-v2-1.cfg -f target/stm32l0.cfg

Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.

adapter speed: 300 kHz

adapter_nsrst_delay: 100

Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD

none separate

Info : Unable to match requested speed 300 kHz, using 240 kHz

Info : Unable to match requested speed 300 kHz, using 240 kHz

Info : clock speed 240 kHz

Info : STLINK v2 JTAG v37 API v2 SWIM v26 VID 0x0483 PID 0x374B

Info : using stlink api v2

Info : Target voltage: 3.248915

Error: init mode failed (unable to connect to the target)

What configuration do I need to connect to the embedded stlink-v2-1?

4 REPLIES 4

Is there a "connect under reset" type option? Some of the firmware goes into a sleep mode and will turn off the logic you're trying to work with.

Should be able to sustain a faster clock (couple of MHz as I recall, but not 24 MHz)

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
MHame.2
Associate II

OpenOCD has nothing I can see that seems applicable, its all rather JTAG-oriented.

MHame.2
Associate II

Got it, thanks. The stm32l0.cfg config file needs to use

reset_config srst_only srst_nogate connect_assert_srst

MHame.2
Associate II

However, when I try to connect to openocd using gdb, I encounter a further problem:

$ openocd -f interface/stlink-v2-1.cfg -f target/stm32l072.cfg reset init

Open On-Chip Debugger 0.10.0

Licensed under GNU GPL v2

For bug reports, read

   http://openocd.org/doc/doxygen/bugs.html

Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.

adapter speed: 240 kHz

adapter_nsrst_delay: 100

Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD

srst_only separate srst_nogate srst_open_drain connect_assert_srst

Info : clock speed 240 kHz

Info : STLINK v2 JTAG v37 API v2 SWIM v26 VID 0x0483 PID 0x374B

Info : using stlink api v2

Info : Target voltage: 3.262228

Info : stm32l0.cpu: hardware has 4 breakpoints, 2 watchpoints

Info : accepting 'gdb' connection on tcp/3333

Warn : Cannot identify target as a STM32L family.

Error: auto_probe failed

Error: Connect failed. Consider setting up a gdb-attach event for the target to prepare target for GDB connect, or use 'gdb_memory_map disable'.

Error: attempted 'gdb' connection rejected

It knows its an stm32l0 CPU, but also it doesn't... what can I try?