Is it possible to add any Conditional syntax in linker script?

[Vivek Patel]

 _vLoadAdd = LOADADDR(.vdata);

 .vdata :

 {

  . = ALIGN(4);

  _startvdata = .;    /* create a global symbol at data start */

  /********** Enable this part when FACTORY is defined *************/

 //  *\file*.o(.data .data*)

 /**************************************************************************************/

  . = ALIGN(4);

  _endvdata = .;    /* define a global symbol at data end */

 } >RAM AT> FLASH

In above linker script section my file.o should be include when my FACTORY macro is enabled in make file.

@Community member​ , Can you please suggest me an example or any workaround?

[hs2]

I’m conditionally preprocess linker scripts using the C preprocessor (e.g. arm-none-eabi-cpp). It’s provided by the GCC tool chain as stand-alone executable.

Conditional parts can be handled by preprocessor directives like #ifdef etc.

#include of other/common linker script parts is also possible this way.

That can be easily integrated into a makefile.