FAQs
cancel
Turn on suggestions
Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.
Showing results for 
Search instead for 
Did you mean: 

Is there a way for the STM8L DAC to retain its output voltage without drawing 80 uA during Halt mode?

TheUser
Associate II

‎2020-09-25 09:56 PM

I'm using Comparator 2 on the STM8L151G4 with DAC1 on the inverting input. When the DAC outputs 0V, the current draw during Halt mode is < 1 uA. If the DAC outputs around 0.5V before the program enters Halt mode, the current draw is 80 uA in Halt mode. Is there any way the DAC output voltage can be maintained during Halt mode and draw less current?

Labels:
0 Kudos
0 REPLIES 0
Top