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STM32H723/733, 725, 735, 730 VREFINT confusions

There are two points of confusions.

1. VREFINT_CAL is a 12-bit precision value

Unlike predecessor of H7 family (H743, H7A3, etc.), the VREFINT_CAL value stored in VREFINT_CAL_ADDR is a 12-bit precision value stored in a 16-bit (8-bit x 2) location.

For example, VREFINT_CAL values from devices in different H7 sub-families are as follow.

STM32H743ZI: 0x5f8a (24458) at 0x1ff1e860-0x1ff1e861

STM32H7A3ZI: 0x5ea8 (24232) at 0x08fff810-0x08fff811

STM32H725ZG: 0x5ea (1514) at 0x1ff1e860-0x1ff1e861

I can understand this change, as H72x, H73x and H730 only supports 12-bit precision on ADC3 where VREFINT is connected to in most applications. However, as RM0468 Rev 2 suggests that VREFINT is also supported on ADC2 where precision can be 16-bit, there is another level of confusion here.

The same applies for other calibration values.

In my opinion, nature of the VREFINT_CAL and other calibration values should be noted where necessary, in the reference manual and/or data sheet.

2. Different values of VREF+ is suggested for ADC1,2 and ADC3.

In RM0468 Rev 2, value used for target VREF+ calculation (corresponds to VREFINT_CAL_VREF) is given differently for ADC1,2 and ADC3.

p.1057 (ADC1,2) uses 3.3V

p.1164 (ADC3) uses 3.0V

Given a singular VREFINT_CAL value, there is clearly something wrong with these descriptions (one of the values, most likely 3.0V from actual measurement and experimental code shows, is wrong, or different VREFINT_CAL must be provided for each of these target VREF+ values).

Thoughts?

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