Thank you so much -- this worked for me.
I also got it working with ODR with some slight changes, below.
Now I just need to get it working with interrupts for double buffered transfers but at least this gives me some confidence. Maybe it's time to jump on the HAL ***** bandwagon that everyone else seems to be on. Working with registers is closer to my AVR experience anyways.
// set up the timer
__HAL_RCC_TIM1_CLK_ENABLE();
__HAL_RCC_TIM1_FORCE_RESET();
__HAL_RCC_TIM1_RELEASE_RESET();
TIM1->PSC = 0; // prescaler
TIM1->ARR = 167; // period (auto reload)
TIM1->CNT = 0; // counter
TIM1->DIER |= TIM_DIER_UDE; // Update DMA request enable
uint16_t gpio_data[] = {
0xAA55,
0x55AA
};
// set up the DMA channel
__HAL_RCC_DMA2_CLK_ENABLE();
__HAL_RCC_DMA2_FORCE_RESET();
__HAL_RCC_DMA2_RELEASE_RESET();
DMA_Stream_TypeDef * stream = DMA2_Stream5;
stream->M0AR = (uint32_t) gpio_data; // memory 0 address
stream->NDTR = sizeof(gpio_data) / (sizeof(*gpio_data)); // number of data
stream->FCR |= DMA_SxFCR_DMDIS; // direct mode disabled
//stream->FCR |= 0b11 << DMA_SxFCR_FTH_Pos; // fifo threshold full
// TIM1_UP is channel 6 on DMA2 stream 5
// stream->CR = 0;
stream->CR |= 6 << DMA_SxCR_CHSEL_Pos; // channel 6
stream->CR |= 0b01 << DMA_SxCR_MSIZE_Pos; // memory size half-word
stream->CR |= 0b01 << DMA_SxCR_PSIZE_Pos; // peripheral size half-word
stream->CR |= DMA_SxCR_MINC; // memory increment
stream->CR |= DMA_SxCR_CIRC; // circular
stream->CR |= 0b01 << DMA_SxCR_DIR_Pos; // memory to peripheral
stream->PAR = (uint32_t) &GPIOC->ODR; // peripheral address
stream->CR |= 0b1 << DMA_SxCR_PL_Pos; // priority medium
stream->CR |= DMA_SxCR_EN; // enable
TIM1->CR1 |= TIM_CR1_CEN; // enable counter
