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Power startup with discrete power supply

PGE
Associate III

Dear All,

According to AN5256 "discrete power supply hardware integration" the power source for VDD is turned off in case of crash to "reset" the hardware using the PWR_ONRST signal. At startup. At cold startup and immediately after a crash the power source for VDD has to be enabled. How the PWR_ONRST signal is drived on in this case as the MPU is not power at all ?

Thanks in advance for any help

2 REPLIES 2
mleo
Senior II

Hi @PGE​ ,

The crash mentioned in AN5256 is caused by watchdog - "Crash (watchdog elapsed)". It means that MPU is normally powered at that moment and the crash is controlled by MPU to recover from e.g. endless loop. PWR_ONRST is genereted in inform outside world.

Hope this helps

Milan

PGE
Associate III

Thanks for your reply!

Could you please confirm that VDD is always on and never ever interrupted even in case of crash recovery ?