STM32G4 ADC jitter from timer to conversion start.

[Asantos]

Hi,

What is the jitter value in nS when the ADC is configured for Asynchronous clock mode?

consider CPU clock = 170MHZ, adc_hclk = 170MHZ, adc_ker_ck = 170/6 MHZ = 56.67MHZ and ADC clock = 56.67MHZ (PRESC = 0)

ST inform in the manual that the jitter is a drawback for Asynchronous clock mode, but I couldn't find the jitter value in nS.

[waclawek.jan]

IMO it's unlikely the jitter is different from the ADC clock's period.

JW