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Application with ST self tests added throws Hard fault exception when Code optimization level is set to Medium/High(Balanced) in IAR workbench for ARM v8.22.3. Same application works for Medium/High(Balanced) optimization without ST self tests.

HJosh.1
Associate

We are using STM32F405RG controller for our project and using ST self tests library for RAM, Flash and clock test. 

Currently we are trying to use code optimization option from IAR workbench functional safety version 8.22.3 and optimize code at medium/High(balanced) level. With this change in optimization level system fails to work and throws Hard fault exception when ran along with ST self tests.

but when we remove ST self tests from application and run application with medium/High(balanced) optimization, system works appropriately without any issues.

please verify these details and let us know why with ST self tests and higher level of optimizations, system fails to work fine? and why without self tests it works appropriately without any issue.

5 REPLIES 5
TDK
Guru

> let us know why with ST self tests and higher level of optimizations, system fails to work fine?

Probably because there's a bug in the code. Just because it runs when optimized doesn't mean there are no bugs.

Higher optimization levels tend to bring out bugs with buffer overruns, or incorrectly initialized memory, or race conditions.

Instrument the hard fault handler and debug it as if it were your own code.

If you feel a post has answered your question, please click "Accept as Solution".

Thanks for reply. But the issue here is ST Self tests are purchased and we only have ".a" library file for it. since there is no source code available for it, I won't be able to debug manually and check where and what is going wrong in self tests. only thing I could found was that March C RAM test was in progress before system thrown Hard fault exception.

Ahh, thanks for the additional info. Maybe since you paid them, you'll get a bit better support? Good luck.

If you feel a post has answered your question, please click "Accept as Solution".

Wouldn't the "safety guy" be able to specifically identify the exact instructions and code generation that caused the failure?

If you're linking a binary blob, surely the issue is what you're passing it, or the code being compiled with/without the optimization.

Identify *specifically* the instructions and registers at/before the faulting location.

Check address range and alignment issues. Watch usage of LDRD/STRD

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