STM32H7 ADC reading only full scale or very close to full scale: VREFBUF enabling calls by HAL take no effect

[RMart.0]

CubeMx 5.6.1, STMH7 SW v 1.7.0:

Symptoms: measurements from ADC1/2/3 makes no sense, they are usually very close to full scale or at full scale.

After much onion peeling, it turns out the VREF is not getting enabled.

The CubeMX generated code does try to enable it in stm32h7xx_hal_msp.c:

 /** Configure the internal voltage reference buffer voltage scale 

 */

 HAL_SYSCFG_VREFBUF_VoltageScalingConfig(SYSCFG_VREFBUF_VOLTAGE_SCALE0);

 /** Enable the Internal Voltage Reference buffer 

 */

 HAL_SYSCFG_EnableVREFBUF();

 /** Configure the internal voltage reference buffer high impedance mode 

 */

 HAL_SYSCFG_VREFBUF_HighImpedanceConfig(SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);

But it forgets to enable the VREFBUF clock before doing that.

This seems to be a HAL bug, as I cannot find a "__HAL_RCC_VREF_CLK_ENABLE();" being called before the 3 lines above configuring the VREFBUF.

[Imen.D]

Hello,

Thank your for your reported issue. I raised this internally for fix.

Best Regards,

Imen

[RMart.0]

While you guys are looking into fixing that, maybe also have a look on this other bug:

Selecting 2.5V reference in cubeMx gives out this code in stm32h7xx_hal_msp.c, which seems correct:

HAL_SYSCFG_VREFBUF_VoltageScalingConfig(SYSCFG_VREFBUF_VOLTAGE_SCALE0);

but then one can see this weird re-shuffling in stm32h7xx_hal.h:

#define SYSCFG_VREFBUF_VOLTAGE_SCALE0  VREFBUF_CSR_VRS_OUT2  /*!< Voltage reference scale 0 (VREF_OUT2) */
 #define SYSCFG_VREFBUF_VOLTAGE_SCALE1  VREFBUF_CSR_VRS_OUT1  /*!< Voltage reference scale 1 (VREF_OUT1) */
 #define SYSCFG_VREFBUF_VOLTAGE_SCALE2  VREFBUF_CSR_VRS_OUT4  /*!< Voltage reference scale 2 (VREF_OUT4) */
 #define SYSCFG_VREFBUF_VOLTAGE_SCALE3  VREFBUF_CSR_VRS_OUT3  /*!< Voltage reference scale 3 (VREF_OUT3) */
 
...
 
#define VREFBUF_CSR_VRS_OUT1        ((uint32_t)0x00000000)                     /*!<Voltage reference VREF_OUT1     */
#define VREFBUF_CSR_VRS_OUT2_Pos    (4U)
#define VREFBUF_CSR_VRS_OUT2_Msk    (0x1UL << VREFBUF_CSR_VRS_OUT2_Pos)        /*!< 0x00000010 */
#define VREFBUF_CSR_VRS_OUT2        VREFBUF_CSR_VRS_OUT2_Msk                   /*!<Voltage reference VREF_OUT2     */
#define VREFBUF_CSR_VRS_OUT3_Pos    (5U)
#define VREFBUF_CSR_VRS_OUT3_Msk    (0x1UL << VREFBUF_CSR_VRS_OUT3_Pos)        /*!< 0x00000020 */
#define VREFBUF_CSR_VRS_OUT3        VREFBUF_CSR_VRS_OUT3_Msk                   /*!<Voltage reference VREF_OUT3     */
#define VREFBUF_CSR_VRS_OUT4_Pos    (4U)
#define VREFBUF_CSR_VRS_OUT4_Msk    (0x3UL << VREFBUF_CSR_VRS_OUT4_Pos)        /*!< 0x00000030 */
#define VREFBUF_CSR_VRS_OUT4        VREFBUF_CSR_VRS_OUT4_Msk                   /*!<Voltage reference VREF_OUT4     */

But according to the manual there should be no re-shuffling: