low lever driver backup sram example

[Evan .1]

Is there an LL example to enable the backup ram.

This doesn't work:

   // Enable PWR clock

   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);

   // Enable Backup ram clock

   LL_APB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_BKPSRAM);

   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_RTCAPB);

   // Enable backup ram regulator

   LL_PWR_EnableBkUpAccess();

   LL_PWR_EnableBkUpRegulator();

   while (LL_PWR_IsActiveFlag_BRR() == 0);

   *(__IO uint32_t *) (BKPSRAM_BASE ) = 0x5A5A5A5A;

I can't find in the documentation what I forgot.

Thanks.

[berendi]

It depends on the STM32 series.

[Evan .1]

STM32F7

[waclawek.jan]

Read out the related registers and check the related bits, to find out whether your code does what you think it does.

JW

[berendi]

It does not look right:

LL_APB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_BKPSRAM);

Always check the actual registers against the reference manual.

[Evan .1]

Ok thanks. This solve the problem.

[Evan .1]

unfortunately the data is lost after a power cycle.

When unplugged I got 3V at the capacitor at Vbat. So Vbat has power.

Do I have to configure my ld file or something?

Thanks.

edit: Reading RTC registers works correctly after a power cycle but backup sram works not.

[berendi]

Check the Battery backup domain section in the reference manual. The order of initialization in your code looks like somewhat different from the one recommended in the reference manual.

Consider replacing the LL function calls with CMSIS style register accesses, e.g.

// instead of LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
RCC->APB1ENR |= RCC_APB1ENR_PWREN;

so that it becomes easier to follow what your code exactly does.

[waclawek.jan]

Nice catch!

:dolphin:

JW

[waclawek.jan]

... and check the registers again...

Also, if you use some prechewed startup code, check if that does not explicitly clear the backup memory.

You don't have cache switched on on the backup memory area, do you?

Run LSE/RTC and check if after powerdown it's running.

Measure VBAT *directly* on the pin, against VDDA *pin* (I am aiming at incorrect layout and/or soldering/bad joints problems).

JW