Starting Tim2/3/4/5 Slaves with HRTIM-SyncOut does not work

[Albi G.]

Hi,

i am desperately trying to start multiple Timers with the HRTIM as single trigger.

The datasheet states, that internal trigger connection "tim_itr10" is "hrtim_out_sync2".

So I enable the HRTIM-Master-Timer

HRTIM1->sMasterRegs.MPER = 0xFFDF;
HRTIM1->sMasterRegs.MCNTR = 0;
Bitfield<HRTIM_MCR_CK_PSC>(HRTIM1->sMasterRegs.MCR) = 5;
Bitfield<HRTIM_MCR_SYNC_SRC>(HRTIM1->sMasterRegs.MCR) = 0;
Bitfield<HRTIM_MCR_SYNC_OUT>(HRTIM1->sMasterRegs.MCR) = 2;
Bitfield<HRTIM_MCR_CONT>(HRTIM1->sMasterRegs.MCR) = 1;
Bitfield<HRTIM_MCR_MCEN>(HRTIM1->sMasterRegs.MCR) = 1;

While the Timers try to listen to:

Timer->SMCR = (14 << TIM_SMCR_TS_Pos); // tim_itr10 = hrtim_out_sync2
Timer->SMCR |= (6 << TIM_SMCR_SMS_Pos); //Trigger Mode

However, nothing happens.

Now, the Datasheet is somewhat unclear if there is really a physical connection between the Timers and the HRTIM, or if this really only done vial GPIO-Pins - since configuring the GPIO-Pin (HRTIM_SCOUT) is mentioned as mandatory step - but it makes no sense that this would route over the Pin, because HRTIM_SCOUT is not selectible as Trigger Input for the Timers, but hrtim_out_sync2 is - which is clearly an internal signal and.

Can someone please clarify this?

[waclawek.jan · Accepted solution]

If in doubts, always start with reading back the registers' content and checking them against the RM.

> Timer->SMCR = (14 << TIM_SMCR_TS_Pos); // tim_itr10 = hrtim_out_sync2

Note, that TS (as well as SMS) field in SMCR is in non-continguous bits, for historical reasons.

Bits 21, 20, 6, 5, 4 TS[4:0]

JW

[Albi G.]

ARE YOU SERIOUS :D

Thank you!!

Cant believe that detail wasted my time like this...

Clearly my fault, still a strange Datasheet documentation. 🙂

[waclawek.jan]

Glad it helped.

I have ideas how to improve the situation and reduce the risk of being caught by this kind of gotcha, e.g. by having proper constants defined for bitfields within the function registers, in the CMSIS-mandated device header, something along the lines of what I have in the augmented 'L4 header on my website efton.sk/STM32.

I've been pushing this idea here and elsewhere for years, ST generally ignoring it and sticking to the Cube line.

JW

[KoRba88]

Albi G.

I have the same problem. My settings in SMCR, TS and MCR are correct but synchronization dont work.

What is strange that my slave timer is runing (why?) but is not in sync with my master timer.

[waclawek.jan]

Start a new thread, describing what are you trying to do and how do the symptoms differ from the expectations, especially how do the relevant registers' content differ from the expected content.

Don't forget to tell the STM32 model you are using.

JW

[KoRba88]

Nevermind, it was working. I just misunderstood how trigger mode works, insteed I needed "reset mode" to work in the way that I need.