BUG: 3 different clocks labeled PLLI2SCLK in CubeMX

[Dave Nadler]

In the clock tool picture below, no less than 3 separate and different clocks are labeled PLLI2SCLK.

1. Top output of PLLI2S
2. Bottom output of PLLI2S (which has another divisor Q)
3. Input to SAI-A mux (which has yet another unlabeled divisor)

So, which one is input to MCO2 source mux?

Also, calculated clock values should be shown on arcs!

ST, Please confirm you understand and reproduced the problems and have filed one or two bug reports...

IOC attached.

PS: CC @Amel NASRI (ST Employee)​, @Camilo LEMOS (ST Employee)​

[waclawek.jan]

What STM32 is this?

What does the RCC chapter in respective RM say about the MCO mapping?

JW

[Khouloud ZEMMELI]

Hello @Dave Nadler​ 

This will be internally checked

Khouloud

[Khouloud ZEMMELI]

​Issue fixed, the fix will be available for the next release.

Best Regards,

Khouloud

[Dave Nadler]

@Khouloud ZEMMELI​ - Which bugs are fixed?

Did you also file a bug report as follows, and is this finally fixed:

Calculated clock values should be shown on arcs!

Thanks,

Best Regards, Dave

@Camilo LEMOS​ @Amel NASRI​