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PWM generation with a phase shift on STM32F030R8T6?

Shreyas2415
Associate II

Hi Guys,

I am using TIM3 with 4 channels to generate a PWM signal for my motors. Right now there is no phase difference between the PWMs, but now there is a requirement where I need to generate a Phase difference like shown in the figure below

0690X00000D99QDQAZ.jpg

I was already able to generate the 180 degrees phase difference PWMs by changing the TIM_OCPolarity value as is described in the article below https://electronics.stackexchange.com/questions/277801/what-does-tim-ocmode-do-on-stm32f4. How do I do it for a phase difference which is less than say 180 degrees ? Is it possible? I am not able to understand if there is some configuration which can achieve this

4 REPLIES 4

Use two timers in master-slave configuration. In Master, set up a different channel than the one outputting the "nonshifted" wafevorm, CCRx of that channel will then determine the phase shift. Set the slave's slave-mode controller to "reset" mode, and let it generate the same waveform.

In newer STM32's timers there's a Combined mode allowing to generate a shifted waveform by combining two channels within one timer, but AFAIK that's not available in the 'F0.

For a limited range of delays, a trick using deadtime is possible in Advanced timers such as TIM1, https://community.st.com/s/question/0D50X0000ADEhGUSQ1/using-tim1-for-get-two-positive-pulses

JW

Hi JW,

Unfortunately I cannot have two timers for my product. So as per you, the only option left is to have 180 degrees phase shift right ?

Regards,

Shrey

No.

Apart from the thread linked by @Community member​ using TIM1 dead time, it's possible to control GPIO outputs with DMA transfers triggered by timer channels.

If there are only two channels as depicted in the question, the following should work (provided there are free DMA channels)

  • Channel 1 outputs the unshifted PWM signal
  • Configure the pin of the other PWM signal as GPIO output.
  • Configure timer channels 3 and 4 to issue a DMA request when the output should change
  • Configure the DMA channels to copy one word each in circular mode, copying the bit pattern needed to be written in GPIO->BSRR to switch the output high/low. E.g. if the output is on PA5, then the channel 3 DMA request should copy 0x20 to GPIOA->BSRR, and the channel 4 DMA request should copy 0x200000 to GPIOA->BSRR,

If there are more channels, see a more general solution here. This unfortunately needs some more RAM to work properly, to hold the bit pattern buffer. If the hardware is not finalized, consider switching to the STM32G0 series, which has more memory for the same price.

Depending on the frequency and jitter tolerance constraints, you might get away with doing all this in software timer interrupts, whithout using DMA at all.

Thanks, i will have to see the space left in my device to do this. Also looks like quite a change. I was thinking if there is a way to directly configure it as we do it for 180 degrees by just configuring certain register settings