how to set long delay with use of timer(like up to 5 minute,)

dbgarasiya · ‎2020-01-17

part number: STM32F779BI

I am using clock frequency 108 MHz ( not system clock , system clock is 216 MHZ)

I don't want to use loop

if not possible what is the maximum value i could set using timer

turboscrew · ‎2020-03-13

Ahh, not 10 ms period, but 10 ms ticks that the timer counts.

You need to divide the clock by 1080000. That won't fit into a 16-bit prescaler. you need to prescale the APB bus timer clock too. The down side is that all timers on the same APB bus are slowed down. 54000 fits in a 16-bit prescaler, so you need to divide the bus timer clock by 20. I don't have the reference manual for that chip at hand to check what you can do with the bus clocks.

If you have a timer with 32-bit prescaler, you write (1080000-1) into the prescaler (supposing that the bus clock to that timer is 108MHz too).

Then you probably have 32-bit counter (and ARR) too. The maximum is then 42949672,95 seconds = ~ 1.3 years.

The other way could be the earlier 10 ms timer and a software counter. The timer interrupts at ARR (=10000-1) and the interrupt adds 1 to a global variable.

View solution in original post

Tesla DeLorean · ‎2020-01-17

TIM2 and TIM5 are 32-bit with 16-bit prescaler, should be able to get quite a span with those.

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dbgarasiya · ‎2020-01-17

Thanks a lot , i have done

dbgarasiya · ‎2020-01-18

I Have done using timer2 and timer5 ,but just want to know is it possible another method to generate delay with using another timers (except TIM2 & TIM5)

i know that other timers are 16 bit , so maximum value could be 65536 ,so if any other way i could configure then please suggest

Thanking in advance

berendi · ‎2020-01-18

The real time clock has two programmable alarms that can be set one month in advance.

Using one timer as a prescaler for another. Setting both PSC and ARR in the master timer sufficiently high, the slave might tick once every second or at even longer intervals. The maximum time interval that can be set using two 16 bit timers is thus 2^64 divided by the timer clock frequency.

turboscrew · ‎2020-01-19

You can also cascade timers such that one timer works as a slave to an other timer such that the slave counts events from its master - like update events.

That slave can then used as a master to a third timer...

dbgarasiya · ‎2020-01-19

I want to use TIM3 as slave and TIM2 as master

RCC->APB1ENR |= (1<<0); // Enable clok for timer 2

TIM2->CR2 |= TIM_CR2_MMS_1;

TIM2->PSC = 54000; // will give me timer2 as 1 ms clock clycle

TIM2->EGR = TIM_EGR_UG;

TIM2->SMCR |= TIM_SMCR_ETPS_0;

TIM3->SMCR |= TIM_SMCR_TS_0;

TIM3->SMCR |= TIM_SMCR_SMS_0 | TIM_SMCR_SMS_1 |TIM_SMCR_SMS_2;

TIM3->EGR = TIM_EGR_UG;

TIM2->CR1 = TIM_CR1_CEN;

TIM3->CR1 = TIM_CR1_CEN;

while(1)

{

//read both timers

}

My problem is I am getting timer 2 proper value but i am getting timer 3 count always zero

I am attaching you my clock configuration with this post

berendi · ‎2020-01-19

Is the clock of TIM3 enabled in RCC too?

dbgarasiya · ‎2020-01-19

no

is it required

will TIM2 won't triger this ?

berendi · ‎2020-01-19

RCC clock is required even to read/write the registers. Are the other registers of TIM3 set as expected, or are they all 0s?

The master clock drives the slave counter, everything else is powered by the RCC clock.