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STM32F4 SPI in interrupt receive triggers OVR alongside active DMA ADC

EMein.1422
Associate

We are using an STM32F415 to communicate with two SPIs and read 4 ADC channels with DMA at the same time. The SPI communication is periodically initiated with a timer at 1 kHz.

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Without the DMA: everything works fine. The timer interrupt triggers, I then initiate the two parallel SPI calls with HAL_SPI_Receive_IT(). Those interrupts trigger, the data gets processed, and we go again. The whole process takes up about 200 us. Which, if the main timer is ticking at 1 kHz, is more than fast enough. We also have a lock to prevent multiple receive interrupts being queued up while the previous ones are still waiting for their handler to be invoked.

The issues arise when we start the ADC with continuous conversion and continuous DMA requests. At some point, one of the two SPI RX callbacks stops being triggered. We eventually determined that the SPI runs into an overrun state (OVR flag is set, and the error handler invoked). But this does not sound right, since we aren't queuing multiple calls, and are using the standard HAL interrupt receive function (which should read the DR register for us and read the SR register to reset overrun state).

Any opinions?

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