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STM32H743 Cortex-M7 core revision?

OVela.1183
Associate

Hi!

I was wondering which ARM Cortex-M7 revision does the STM32H743 uses.

Does all the H7 family use the same core rev?

Asking because we currently have a STM32F746 and we want to avoid de single stepping bug while debigging from the r0p0 and r0p1 core revisions.

I have checked on the reference manual RM0433 and the only reference that I can find is in page 3057 on the Access port identification register (AP_IDR) which tells me that it is at least r0p5 but I would like some confirmation.

Thank you very much!

1 ACCEPTED SOLUTION

Accepted Solutions

r1p1

Topic covered here several times https://community.st.com/s/question/0D50X0000AnssYLSQY/how-can-i-check-the-revision-of-the-m7-core-without-checking-the-registers

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View solution in original post

9 REPLIES 9
Uwe Bonnes
Principal II

You mix up F7 and H7. The single step bug only affects F7, F76 is I remember right. H743 has several revisions, with lots of differences, Check an actual datasheet and errata sheet!

r1p1

Topic covered here several times https://community.st.com/s/question/0D50X0000AnssYLSQY/how-can-i-check-the-revision-of-the-m7-core-without-checking-the-registers

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>>Does all the H7 family use the same core rev?

ST tends to stick with a single IP in each design, probably relates to how it is licensed and paid for

CPUID 411FC271 DEVID 450 REVID 1001 Cortex M7 r1p1

CPUID 411FC271 DEVID 450 REVID 1003 Cortex M7 r1p1 STM32H7xx Rev Y

CPUID 411FC271 DEVID 450 REVID 2001 Cortex M7 r1p1 STM32H7xx Rev X

CPUID 411FC271 DEVID 450 REVID 2003 Cortex M7 r1p1 STM32H7xx Rev V

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Piranha
Chief II

STM32H7: AN4891 section 2.6.

STM32F7: AN4667 section 1.7.

SEGGER have implemented a workaround for this hardware core bug in their J-Link debuggers. On-board ST-LINK can be converted to J-Link OB.

https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/

> F72x/73x r1p1

Both - AN4667 and AN4891 - suggest r1p0. On which side is the error - your or ST's?

Who do you trust more?

It definitely uses a different core than the other F7's, the caches on the F722 are bigger. And it was after all the in-bound flack about the single-step issue, etc. If I were trying to pick between the F750 and F730 value-lines, I'd be in the F730 camp, although the die has less flash

https://community.st.com/s/question/0D50X0000AFpr8rSQB/on-the-stm32f777-i-am-trying-to-determine-if-there-is-a-readable-silicon-revision-level

H743XI Z
CPUID 411FC271 DEVID 450 REVID 1001
Cortex M7 r1p1
STM32H7xx
C0000018 20000F48 00000000
10110221 12000011 00000040
FPU-D Single-precision and Double-precision
 
F746ZG
CPUID 410FC271 DEVID 449 REVID 1001
Cortex M7 r0p1
STM32F74xxx or F75xxx
C0000000 FFFFFFF8 00000000
10110021 11000011 00000040
FPU-S Single-precision only
 
F767ZI
CPUID 411FC270 DEVID 451 REVID 1000
Cortex M7 r1p0
STM32F76xxx or F77xxx
C0000000 FFFFFFF8 00000000
10110221 12000011 00000040
FPU-D Single-precision and Double-precision
 
F722ZE
CPUID 411FC271 DEVID 452 REVID 1000
Cortex M7 r1p1
STM32F72xxx or F73xxx
C0000000 FFFFFFF8 00000000
10110021 11000011 00000040
FPU-S Single-precision only 

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> Who do you trust more?

Well... not the ST... 🙂

@Amel NASRI ​, @Imen DAHMEN​ ,

F72x/73x core revisions should be corrected in AN4667 and AN4891.

I have a STM32F7308-DK, will double check that later. I don't think they stepped the silicon

https://www.st.com/en/evaluation-tools/stm32f7308-dk.html

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OVela.1183
Associate

Thank you all for your answers!!

Next time I will make a more thorough search through the forum, but it appears I was not using the correct keywords and I did not know where to look!