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STM32H747 freezes waiting for VOSRDY

TDK
Guru

I'm trying to boot the M7 core on a STM32H747 with a 480MHz clock rate. I have the project and clock settings configured in STM32CubeMX.  When ran, the program freezes while waiting for the VOSRDY flag to be set, which never happens.

The code appears to be doing everything it should per the reference manual:

The sequence to activate the VOS0 is the following:

  1. Ensure that the system voltage scaling is set to VOS1 by checking the VOS bits in PWR D3 domain control register (PWR D3 domain control register (PWR_D3CR))
  2. Enable the SYSCFG clock in the RCC by setting the SYSCFGEN bit in the RCC_APB4ENR register.
  3. Enable the ODEN bit in the SYSCFG_PWRCR register.
  4. Wait for VOSRDY to be set.

Once the VCORE supply has reached the required level, the system frequency can be increased.

The code is as follows:

 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} // <--- FREEZES HERE

 which runs this:

  if((__REGULATOR__) == PWR_REGULATOR_VOLTAGE_SCALE0) \
  { \
   MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); \
   /* Delay after setting the voltage scaling */ \
   tmpreg = READ_BIT(PWR->D3CR, PWR_D3CR_VOS); \
   MODIFY_REG(SYSCFG->PWRCR, SYSCFG_PWRCR_ODEN, SYSCFG_PWRCR_ODEN); \
   /* Delay after setting the syscfg boost setting */ \
   tmpreg = READ_BIT(SYSCFG->PWRCR, SYSCFG_PWRCR_ODEN); \
  } \
 

I've verified the SYSCFGEN bit in RCC_APB4ENR is set. However, VOSRDY never gets set.

I've also verified the __HAL_PWR_GET_FLAG macro is checking the right thing.

I get the same behavior if I try to change the clock to 400MHz (VOS1), so I don't think the issue is specific to VOS0.

This is on a STM32H747I-DISCO board.

What could be wrong?

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10 REPLIES 10

Probably CubeMX ballsing things up. Seen a couple of people report similar failures.

Had these boards running via examples in CubeH7 trees

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berendi
Principal

The CubeH7 example running at 480MHz (Applications/FPU/FPU_Fractal) sets VOLTAGE_SCALE1 first, then waits for PWR_FLAG_VOSRDY before proceeding to set SYSCFG_PWRCR_ODEN.

  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
#if (USE_VOS0_480MHZ_OVERCLOCK == 1)
  __HAL_RCC_SYSCFG_CLK_ENABLE();
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);  
  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}

If I add that line, it just freezes there instead. VOSRDY never gets set after setting VOS1. Doesn't make sense.

If you feel a post has answered your question, please click "Accept as Solution".

Can you get one of the 480MHz example projects working, with USE_VOS0_480MHZ_OVERCLOCK defined as 1 in main.h ?

That's definitely an option.

They don't compile in STM32CubeIDE immediately. I could work through the errors and get them to compile, but I'd rather spend the time on something else.

I have an STM32H745NUCLEO board coming in that I think I'll wait on instead. There's something else funny about this board that I can't figure out. It only connects to ST-Link if BOOT0 is high, despite me not touching the SWD pins.

If you feel a post has answered your question, please click "Accept as Solution".
VTaya.1
Associate III

Hi.

You need to change power configuration according to hardware arrangements ( 1 SPMS only , 2 LDO only , 3 SPMS - LDO cascaded , 4 External power supply ) for reference check the STM32H745NUCLEO  schematic. Their they mush have given details about all the power configurations.

Also you need to make following changes in your code at function .

void SystemClock_Config(void)

{

 RCC_OscInitTypeDef RCC_OscInitStruct = {0};

 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

 /** Supply configuration update enable

 */

 HAL_PWREx_ConfigSupply ( PWR_LDO_SUPPLY );

/********* change the parameter as per your power configuration , goto PWR_LDO_SUPPLY macro defination , there you will find macros other combination , select relevant one *****************/

 /** Configure the main internal regulator output voltage

 */

 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}

 /** Macro to configure the PLL clock source

 */

 __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSI);

.

.

.

.

.

}

connect your board to your PC, put the controller into debug mode, add break point after init done and test the code.

Note : if it still got stuck in waiting for voltage level to set, simply unplugged the cable, make sure no failure occurred into popped folder window for controller. put the controller in debug and hit the RUN . This worked for me.

MNico.2
Associate II

I have essentially the same issue on a STM32H7A3.

  1. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
  2. while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} // <--- FREEZES HERE

The strange thing is that the problem occurs sometimes.

While sometime the device works properly. Even for long period, let's say

the board can work properly for some week.

I supposed it can be tied to the power supply but I can't see

any issue in the design. By the way I'm using LDO supply configuration

providing a regulated 3.3V to the device.

0693W00000GZQnwQAH.jpgI've checked the configuration and is all connected as suggested by the

manual.

Did someone managed to understand the origin of this issue?

Thanks. I have a board with external 3v3 supply tied to all the power pins and same behavior - won't start up in standalone, debug sessions would work if started up into system bootloader (pulling boot0 to 3v3).

What is strange - debug connection works even with PSU configured with SMPS if you comment out the check for VOSRDY. I would expect it to fail, since SMPS output messes with the rest of the power bus, but I guess it's an impedance thing. Didn't actually measure.

Setting source to LDO and scaling to 0 helped.

I'm facing a similar issue on STM32H745: on rare occasions the chip gets stuck on the VOSRDY check, and the only way to get it back on track is the BOOT0 / Reset power cycle.

Does someone have further insight on this topic?