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Which QSPI flash would you choose for custom board?

HP
Senior III

I'm banging my head against this one.

Initially I chose the W25Q128JV because it seemed like a suitable match for TouchGFX applications but it seems that the register layout is quite different from the (discontinued) Mircon part that is on the F746 board.

I've read somewhere that the Micron parts have better support but is there anyone out there that have had any luck with a custom board with QSPI flash implementation?

ANY help will be much appreciated!

14 REPLIES 14

Well the Winbond parts do take some effort because ST doesn't provide drivers (there being a relationship with fab/product with Micron/Intel and ST/Spansion)

The Micron parts do support DTR/DDR so bandwidth considerations there.

The 300mil SOIC16/SOP16 footprint has broadest compatibility/options.

The 1Gbit Winbond stacked device seems super unhelpful, and the NAND device doesn't support XIP

The W25Q256 and W25Q512 seems very similar, the driver for one seems to be working with the other. These devices need 4-byte addressing (ie >16MB)

Dual-Banking the devices takes some getting one's head around, but does improve throughput, obviously, and eats more pins.

Also have boards running with smaller ATMEL/Adesto parts in single/dual configuration, F7 and H7

ST doesn't sponsor any community work

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My issue generally with these flash parts is price/availability, having been burned on a number of occasions, I'd provide for as many options as possible.

If you have a couple of favoured parts consider putting down a dual-foot print of the SOP16 300mil / 7.5mm with a SOIC8 at 90 degrees inside the larger land-pattern.

Keep the signals relatively short and equally lengthen. Some of the these parts will happily clock at 100 MHz

Not sure how many pins your display uses, but perhaps look at the 100-pin H750VB device, it can support two QSPI, and has a lot of internal SRAM

Most of the QSPI circus is with the write/erase, not sure the application needs all this. Might need to consider if needing to do field updates.

The read/xip setup does take a little work, but I think one could probably code a library that could use the JEDEC READ ID and adapt sufficiently. Realistically over the life of a product you might expect to use several devices in production as availability and prices change, or new steps of the silicon add more/different features.

uBlox has long used QSPI memories, their approach was to keep all the chip specific stuff in a 4KB sector such that the ROM could boot-strap into the first few sectors, and then code selectively placed their by the update utility would manage the specifics of Winbond vs SST vs Macronix, etc.

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It just seems strange that the chip used on the Dev-kit is obsolete. I get that the life-time of memory devices is quite short since the fabs tend to make bigger and better all the time. But having no other standard design to turn to? It's not really helpful from ST side.

I saw your interesting work with timing the operations on the larger chips but I'm not really sure I can benefit from that. I'm quite focused on getting a TouchGFX system up and running but this QSPI is driving me up the wall.

I'm tempted to just roll with it and get a roll of the obsolete chips but it just makes my body cringe at the thought of designing a dead part into a new board.

Another headscratcher is that damn .stldr thing. I got a project compiling in the IAR kickstart edition (free code size limited compiler) and I think I got most of it right - but since I'm struggling with getting a reliable connection (even normal SPI is causing trouble) I might as well look for a better albeit more expensive solution.

I'm just curious if other people out there got anything like this to work?

The F746G-DISCO is a bit antiquated at this point, I'm sure when ST can't source any more N25Q128 parts they'll walk up the capacity ladder and provide new drivers, docs, etc. Either that or stop making the board, and moving to a newer alternative. The guys making the panel/touch will likely bore of making that too at some point.

Most of the more recent EVAL/DISCO either have a pair of 25QL512 parts, or the dual die 25TL01G parts.

The external flashing in IAR looks to be done with scripts, unlike Keil and ST which insist on compiled binaries and locking in clocks/pins. Given the combination of pin mapping it wouldn't have been that hard to build an automated tool. I ended up writing a tool last night to reconfigure/patch the pins in the F469I-DISCO loader automatically.

I think @Andreas Bolsch​  has an open/scripted approach to the loaders in OpenOCD

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HP
Senior III

Lucky for me I chose another display to begin with but you have a very important point on the life-cycle of, well, all parts really.

I'm new to ST chips in general - it seems that quite a lot of work is done by 'customers' and other enthusiasts. That bothers me more than it should.

oh, that's a great suggestion. my current design is SOIC-8 and While swapping the package yesterday I managed to rip one of the pads :\

I will do another spin of the PCB in a few weeks so I will make a hybrid footprint for sure!

I'm running a 24-bit parallel LCD so about 30 wires - my application hinges on TouchGFX and H7 isn't supported yet.

I believe you're right, I don't need anything fancy for the application, the flash is purely for loading graphical assets during boot.

I've found a Macronix part, mx25l12833fm2i-10g, that looks like it has the same register definitions for QPI - the Winbond one sure did not!

I'm still not giving up hope that maybe I can find a part that could fit in with minimal changes

HP
Senior III

Funny,

Macronix have even made a note on the similarities of the chips:

https://www.macronix.com/Lists/ApplicationNote/Attachments/1947/AN0244V1%20-%20Comparing%20Micron%20N25Q128A%20with%20Macronix%20MX25U12835F.pdf

strictly speaking it's not the mx25l12833fm2i-10g but the MX25U12835FM2I-10G which is a 1.8V device.. but I guess they are pretty similar!

One very obvious problem with my current design could very well be the track lengths. I've tried to circumvent this issue by clocking slower but of course that's not enough when running the final design

>>That bothers me more than it should

I think you need to let that go<G>

When you climb mountains there often aren't pre-run rope lines waiting for you, or a cafe at the summit. There might not be sherpas who know what they are doing, or too carry your stuff.

In embedded you frequently have to do your own software work, or build for hardware no one has ever used before, or might be another 12 weeks away when you finish writing the ROM based boot-loader for tape-out to the fab.

ST's primary customers are billion dollar enterprises with their own deep roster of engineers, and cross-domain expertise.

The rest of us are expected to bring our own rope and lunch.

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