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Does STM32F0 have SWO?

kraiskil
Associate III

Does the STM32F0x1 line have SWO (the output trace) in its debug port?

Reading the User Manual of STM32F0-Discovery (UM1525) it looks like SWO is on pin PB3.

But the Reference Manual for the board's STM32F051 (RM0091) does not even mention SWO, only SWCLK and SWDIO.

What am I missing?

1 ACCEPTED SOLUTION

Accepted Solutions

It does not support it within the core. There is an Event Recorder method in Keil that provides a similar debug channel

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8 REPLIES 8

It does not support it within the core. There is an Event Recorder method in Keil that provides a similar debug channel

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kraiskil
Associate III

Ok, so the "SWO" mentioned in the Disco User Manual is a software implementation (i.e. requiring on target SW to enable), not a proper SWO.

No wonder my Segger had problems reading from it 🙂

> Does the STM32F0x1 line have SWO (the output trace) in its debug port?

The description in UM1525 is indeed misleading - PB3 is connected to the SWO input of the STLINK, but in the 'F0, PB3 has no SWO capability.

The reason probably is, that due to the great pin compatibility between the early STM32 families, you can probably swap the target chip for a 64-pin 'F1 or 'L1 without any much ado - and these, being Cortex-M3-based, do have SWO on PB3. This was pre-Nuceo era, it might've been a consideration back then.

JW

The ST-LINK supports, and externally headers signal, the Target does not.

ST just consistently wires SWD/JTAG pins, allowing for drop in parts when "pin-for-pin" compatibility is adhered too.

@Bob Boys​ wrote some app notes

See Page 10 here

http://www.keil.com/appnotes/files/apnt_321_v0.96.pdf

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Bob Boys
Senior

Cortex-M0 and M0+ do not have Serial Wire Viewer (SWV) that comes out the SWO pin. Neither does Cortex-M1 AFAIK.

Cortex-M0 and M0+ can have either SWD or JTAG - but not both. A chip designer decision)

Note SWO pin is multiplexed with JTAG TDO - so JTAG will not work with SWV - must use two pin SWD.

All other Arm processors can and usually have both JTAG and SWD available.

Page 4 of the document listed above has an outline of CoreSight definitions that are useful to know about.

Keil Event Recorder (ER or EVR) uses DAP (Debug Access Port) to access variables and memory to assist in debugging your project - it proves visibility.

www.keil.com/pack/doc/compiler/EventRecorder/html/

DAP is provided through the debug connections commonly known as SWD or JTAG.

uVision Watch, Memory, Peripheral and RTOS Viewer windows also use DAP and also update while the program is running. A printf feature not using a UART is available on either DAP or ITM (ITM uses the SWO pin). So this is available for Cortex-M0 and M0+ via DAP.

EVR works with all Arm Cortex-Devices and all common debug adapters I have tested with uVision including ST-Link V2 and V3.

EVR works with all versions of uVision including the free MDK-ST and free MDK-Lite the evaluation version.

You can use Event Recorder to annotate your own code for various purposes including collecting power consumption when using a Keil ULINKplus.

www.keil.com/ulinkplus

Micrium has an interesting program called uC-Probe that also uses DAP: https://www.micrium.com/ucprobe/

You need not be using Micrium RTOS or any RTOS for this. I don't know if it works with ST-Link.

I hope this content helps and Keil EVR is useful to you.

Bob Boys

Arm

Thanks! Much interesting information in your post.

Unfortunately, the Keil EVR seems not to be the solution for me because of the EVR feature:

"For Arm Cortex-M3/M4/M7/M33 processor based devices, Event Recorder functions will not disable interrupts."

What I am trying to achieve is profiling the execution of an interrupt service routine on CortexM0 🙂

Also, switching to a Windows-only tool chain is pretty steep price to pay, even if Keil seems to deliver a lot of goodies.

Hello

Most of our customers do not want the debugger interfering with interrupts.

Are you trying to measure how long your interrupt routine is one and how many times executed ?

If so, EVR has a Start and Stop feature that you insert into your code and such information is collected and displayed in the Event Statistics window:

See page 13: www.keil.com/appnotes/docs/apnt_321.asp

If you are using a Keil ULINKplus, power consumption information will also be displayed.

We have many customers successfully using uVision with vm such as Wine or VMware and so on.

Perhaps you can find a debugger that runs on MAC or Linux.

Here is some additional information regarding interrupts and Event Recorder on Cortex-M0/M0+/M23:

From Keil engineers:

Yes it affect interrupts. We need some of the accesses to be atomic to avoid that different tasks/interrupt handlers writing events do corrupt the buffer/status object contents. This is only guaranteed either by disabling interrupts, or by using LDREX/STREX instructions which are not available in the v6-M and v8-M Baseline instruction sets. We made sure though that the times with disabled interrupts are kept to a minimum.