cancel
Showing results for 
Search instead for 
Did you mean: 

Not receiving DMA Transfer Complete interrupt.

BCoch
Senior

I'm using both SPI1 and SPI2 on an STM32G071RBT Nucleo board, using STM32CubeIDE code generation and LL interface. Both SPIs are configured to use DMA for receive and transmit. SPI1 uses channels 2 & 3; SPI2 uses channels 4 & 5. The DMA transmit complete interrupt is enabled on the receive channels. (2 & 4).

SPI1 works fine, but not SPI2!?!?! The SPI transaction is successfully started, and the data sent, but I never receive the channel 4 transfer complete interrupt. Any thoughts? Does the DMAMUX need to be configured to receive a channel 4 interrupt? (The interrupt handler is called "DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler".)

Thanks for any help.

1 ACCEPTED SOLUTION

Accepted Solutions
BCoch
Senior

Hi Jan,

Thanks for the prompt reply. I figured it out (in the shower this morning)! To debug this, I was calling my test function whenever I pressed a key. This was at interrupt level - apparently a higher priority than the transfer complete interrupt! Doh! When no longer called at interrupt level it worked fine.

(And I'm not doing any configuration of the DMAMUX.)

Kind regards,

Bruce.

View solution in original post

3 REPLIES 3

Read out and check registers of the DMA channel in question, including its related DMAMUX setting. If it completed transfer (NDTR=0 unless circular), you should see respective TCIF being set in the status register of DMA. That triggers the interrupt, if properly enabled in NVIC.

> The interrupt handler is called "DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler"

That just means that the interrupt vector is shared for not only the DMA channels but also for the DMAMUX overrun. DMAMUX of course has to be configured to have DMA transfers at all, but not specifically for the interrupt.

Read the manual.

JW

BCoch
Senior

Hi Jan,

Thanks for the prompt reply. I figured it out (in the shower this morning)! To debug this, I was calling my test function whenever I pressed a key. This was at interrupt level - apparently a higher priority than the transfer complete interrupt! Doh! When no longer called at interrupt level it worked fine.

(And I'm not doing any configuration of the DMAMUX.)

Kind regards,

Bruce.

Bruce,

> I figured it out (in the shower this morning)!

A very good debugging strategy.

I mean it, seriously.

Jan