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Getting I2S output of 192k for STM32F446?

NNIA
Associate II

Hi, 

I would like to know if I can use STM32F446 and generate 192k I2s output. consider I need to use USB_OTG_HS.

I am trying to setup pins and clock configuration in STMCube, but for the I2S_APB1 it gives me range of 172MHZ to 192. and even with 192 in the configuration for I2S2(Master) it says the error between selected and real value is 2.8% how can I get 0%

Thanks

Neda

11 REPLIES 11

Are you talking about CubeMX?

What is your input clock source?

Do you intend to use USB_OTG_HS with internal or external PHY?

What is I2S_APB1?

What about reading the RCC chapter and calculating the needed values for PLL yourself?

JW

NNIA
Associate II

Hi JW,

thanks for your respond.

Are you talking about CubeMX?

 Yes I am using CubeMX.

What is your input clock source?

I am trying to use 12MHZ, or 18.432MHZ.(haven't pick one. but this is for Audio device)

Do you intend to use USB_OTG_HS with internal or external PHY?

I want use USB_OTG_HS with external PHY.

What is I2S_APB1?

I2S_APB1 clock is the clock for I2S.

What about reading the RCC chapter and calculating the needed values for PLL yourself?

I gonna review that.

NNIA
Associate II

Hi JW,

I did more research and read previous post regarding same issues with other STM families.

I still have the issue and based on the STM32F446 Reference manual fS = I2SxCLK / [(32*2)*((2*I2SDIV)+ODD)*4)] when the channel frame is 32-bit wide and we know I2SDIV can't be 0 or 1. so for I2SDIV=2, ODD=0,fs=192khz, I2SCLK is 196.6 but in the STCUBMX there is limit for I2S_APB1 CLK with the max value of 192Mhz.

NNIA
Associate II
 
NNIA
Associate II

if I disable master clock output on I2S2 it will not give me the above error.

Piranha
Chief II

SAI is a dedicated peripheral for I2S and other audio protocols. I recommend using that. With 18,432 MHz crystal...

M = 10

N = 147 / 160

Q = 2

QDiv = 12 / 6 / 3

And you've got perfect 44,1/48 kHz and respective double and quadruple frequencies. Multiplied with 256 of course, which is what you typically need for I2S master clock.

Use this to find ideal multipliers/dividers:

http://www.alcula.com/calculators/math/simplify-fractions/

And for example take a look at my message there:

https://community.st.com/s/question/0D50X0000AX8ALp/is-it-possible-to-clock-the-stm32h7-sai-for-4896192-khz-output-with-internal-oscillators

P.S. Yes, there is a message from me with two images... In this parody of a forum you'll have to press "Show previous answers" to show the last (my) message at... beginning!

NNIA
Associate II

Hi Piranha,

since I am using USB HS with internal PHY i can't use SAI.

NNIA
Associate II

sorry, I meant external Phy.

Piranha
Chief II
  1. Use I2Sx_MCK and go up to 96 kHz.
  2. Don't use I2Sx_MCK and obtain master clock with external PLL or a DAC with integrated PLL.
  3. Don't use I2Sx_MCK and output PLLI2S on MCO2 as a master clock. It can work because (for example): "The external clocks, which are required to operate the AK4490EN, are MCLK, BICK and LRCK. MCLK should be synchronized with LRCK but the phase is not critical."
  4. Change package to LQFP100 and use SAI.