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BUG: STM32Cube_FW_H7_V1.5.0 - HAL_RCCEx_GetPLL3ClockFreq() reports incorrect frequency when FRACN mode enabled.

ebrombaugh1
Associate II

HAL_RCCEx_GetPLL3ClockFreq() computes the frequency of the three outputs of PLL3. When PLL3 is in Fractional N mode it reports wildly inaccurate frequencies which can affect the setup of other peripherals like the SAI.

The problem is that the PLL3 code seems to have been ported from another PLL without correcting bit positions. The pll3fracen variable contains the value of the RCC_PLLCFGR_PLL3FRACEN and is used to multiply another value by 0 or 1, but it has not been shifted down to bit position 0, so the multiplication ends up scaling incorrectly.

line 2070 of stm32h7xx_hal_rcc_ex.c reads as

 pll3fracen = RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN;

but should be

 pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN)>>RCC_PLLCFGR_PLL3FRACEN_Pos;

Hope that helps.

Eric

3 REPLIES 3
Amel NASRI
ST Employee

Hi @ebrombaugh1​ ,

Thanks for highlighting this issue, I reported it to our development team.

This should be the case for both HAL_RCCEx_GetPLL2ClockFreq() & HAL_RCCEx_GetPLL3ClockFreq().

-Amel

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ebrombaugh1
Associate II

Great! Hope they can roll that into a future release so I don't have to keep patching it by hand.

Yes, it will 🙂

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.