cancel
Showing results for 
Search instead for 
Did you mean: 

PSRAM working Issue with FMC interface in STM32F723 ?

SShin.18
Associate II

I am interfacing (IS66/67WV51216EBLL) 8Mbit static RAM organized as 512K words by 16 bits with STM32F723 microcontroller using it’s inbuilt FMC interface. FMC is configured in 16bit mode. Read and write operations are working as expected. But I have some confusion related to addressing memory as:      

1.     As PSRAM is having only 19 (A18-A0) address lines which means that 512K addresses can accessed, which is true for 16_bit address pointer and I am able to read/write whole memory (1Mbyte) which means one physical address points to 16 bit data.

2.     Confusion comes when I access memory using 8_bit pointer in which I am able to address memory above 512K address(up to 1023K last address accessed).Which is not possible for PSRAM as there are only 19 address lines.

3.     I also know that FMC is able to access 16Bit memory byte wise using UB# (upper byte control) and LB# (lower byte control) on data line if external memory supports byte control mechanism. My memory also supports this functionality and all hardware connections are proper. All FMC pins are in alternate function mode.

Please correct me I am interpreting it wrong, my conclusion from all my experiments with PSRAM is that, FMC is using data bytes control mechanism to read/write data from memory and the addresses which I am using are not actual memory addresses used to read/write data.

Example: My base address for PSRAM is 0x60000000.If I read data using 8 bit pointer then,

a. Data read from address 0x60000000 will be LSB of actual data present on memory location 0x60000000.

b. Data read from address 0x60000001 will be MSB of actual data present on memory location 0x60000000.

c. Data read from address 0x60000002 will be LSB of actual data present on memory location 0x60000001.

d. Data read from address 0x60000003 will be MSB of actual data present on memory location 0x60000001.

and this goes forward…

This means that incrementing address by one, FMC will point to next byte instead of next memory location of PSRAM.

 If anyone has experience in this field please let me know that I’m getting it right or wrong.

1 ACCEPTED SOLUTION

Accepted Solutions

Yes, except:

a. Data read from address 0x60000000 will be LSB of actual data present on memory location 0x00000.

b. Data read from address 0x60000001 will be MSB of actual data present on memory location 0x00000.

c. Data read from address 0x60000002 will be LSB of actual data present on memory location 0x00001.

d. Data read from address 0x60000003 will be MSB of actual data present on memory location 0x00001.

Remember, you've said there are only 19 physical address lines.

JW

View solution in original post

2 REPLIES 2

Yes, except:

a. Data read from address 0x60000000 will be LSB of actual data present on memory location 0x00000.

b. Data read from address 0x60000001 will be MSB of actual data present on memory location 0x00000.

c. Data read from address 0x60000002 will be LSB of actual data present on memory location 0x00001.

d. Data read from address 0x60000003 will be MSB of actual data present on memory location 0x00001.

Remember, you've said there are only 19 physical address lines.

JW

thanx for your help.