when SRAM & TFT connected to FSMC, One of them doesn't work properly

[aulus.18]

Hello,

My board includes SRAM, TFT (5.0 inch with ssd1963), NOR, NAND circuits.

When TFT is not connected, SRAM passes all tests (all memory read/write).

(I didn't test NOR or NAND)

if TFT is connected, Sram test fails any address. (Or TFT doesn't work properly in sram test)

(The project includes stemwin)

While writing/reading to sram, I think TFT too or the exact opposite.

Data , addresses, Read,write etc pins are common but all chip selects is following.

PG9 <-> FSMC_NE2 // NOR-CS

PG10 <-> FSMC_NE3 // SRAM-CS

PD7 <-> FSMC_NCE2 // NAND-CS

PG12 <-> FSMC_NE4 // TFT-CS

I wanted to ask that don't look hardware. in fact, I checked hardware before. All connections were OK. Isn't this state related CS? (by the way, there is not hardfault state)

how can such a situation occur?

Thanks.

[aulus.18]

i read the following article from a chinese source, ( between comments)

/*

 * PG9 is connected to the CE side of NORFLASH in order to prevent the NORFLASH signal from affecting the SRAM.

 * Here let CE = 1 first, that is, PG9 = 1, otherwise the SRAM will not test successfully.

 * Or when the hardware is designed, the NORFLASH CE pin is pulled down.

 */

Why Sram and nor affect each other?

For PG9 is AF, if I don't write/read to NOR ( to only SRAM address), PG9 ( FSMC_NE2 - NOR_CS) can be enable?

PG9 <-> FSMC_NE2 // NOR-CS

PG10 <-> FSMC_NE3 // SRAM-CS

[Tesla DeLorean]

None of us here know what STM32 chip, board and source you are using.

[aulus.18]

You're right, Sorry,

Stm32F407ZET6, The connections is following,

TFT and SRAM are working alone but together, tft freezes (mcu is working) and sram test is getting faulty

TFT Connections:
PD14 <-> FSMC_D0            // DATA-0
PD15 <-> FSMC_D1            // DATA-1
PD0 <-> FSMC_D2            // DATA-2   
PD1 <-> FSMC_D3            // DATA-3
PE7 <-> FSMC_D4            // DATA-4
PE8 <-> FSMC_D5            // DATA-5
PE9 <-> FSMC_D6            // DATA-6
PE10 <-> FSMC_D7            // DATA-7
PE11 <-> FSMC_D8            // DATA-8
PE12 <-> FSMC_D9            // DATA-9
PE13 <-> FSMC_D10            // DATA-10
PE14 <-> FSMC_D11            // DATA-11
PE15 <-> FSMC_D12            // DATA-12
PD8 <-> FSMC_D13            // DATA-13
PD9 <-> FSMC_D14            // DATA-14
PD10 <-> FSMC_D15            // DATA-15
// tft control pins
PF0 <-> FSMC_A0                 // LCD-RS
PG12 <-> FSMC_NE4            // LCD-CS 
PD4 <-> FSMC_NOE            // LCD-OE 
PD5 <-> FSMC_NWE            // LCD-WE 
 
K91G08U0B:
PD11 <-> FSMC_A16				// NAND-CLE
PD12 <-> FSMC_A17				// NAND-ALE 
PD6  <-> FSMC_NWAI 			        // NAND-RB 
PD4  <-> FSMC_NOE				// NAND-OE 
PD7  <-> FSMC_NCE2			        // NAND-CS 
PD5  <-> FSMC_NWE				// NAND-WE 
 
SST39VF1601 :
PF0  <-> FSMC_A0				// NOR-ADDRESS-0
PF1  <-> FSMC_A1				// NOR-ADDRESS-1
PF2  <-> FSMC_A2				// NOR-ADDRESS-2
PF3  <-> FSMC_A3				// NOR-ADDRESS-3
PF4  <-> FSMC_A4				// NOR-ADDRESS-4
PF5  <-> FSMC_A5				// NOR-ADDRESS-5
PF12 <-> FSMC_A6				// NOR-ADDRESS-6
PF13 <-> FSMC_A7				// NOR-ADDRESS-7
PF14 <-> FSMC_A8				// NOR-ADDRESS-8
PF15 <-> FSMC_A9				// NOR-ADDRESS-9
PG0  <-> FSMC_A10				// NOR-ADDRESS-10
PG1  <-> FSMC_A11				// NOR-ADDRESS-11
PG2  <-> FSMC_A12				// NOR-ADDRESS-12
PG3  <-> FSMC_A13				// NOR-ADDRESS-13
PG4  <-> FSMC_A14				// NOR-ADDRESS-14
PG5  <-> FSMC_A15				// NOR-ADDRESS-15
PD11 <-> FSMC_A16				// NOR-ADDRESS-16
PD12 <-> FSMC_A17				// NOR-ADDRESS-17
PD13 <-> FSMC_A18				// NOR-ADDRESS-18
PE3  <-> FSMC_A19				// NOR-ADDRESS-19
PE4  <-> FSMC_A20				// NOR-ADDRESS-20
PE5  <-> FSMC_A21				// NOR-ADDRESS-21
PE6  <-> FSMC_A22				// NOR-ADDRESS-22
 
PG9  <-> FSMC_NE2				// NOR-CS
 
IS61WV51216EDALL:
PG10 <-> FSMC_NE3				// SRAM-CS 
PE0  <-> FSMC_NBL0			       // SRAM-LB 
PE1  <-> FSMC_NBL1			       // SRAM-UB