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LL ADC with DMA

IByco
Associate

I have problem with configuration ADC (6 regular channel) and DMA. CubeMX generate next code:

static void MX_ADC_Init(void)
{
... 
/** Configure Regular Channel 
  */
  LL_ADC_REG_SetSequencerChAdd(ADC1, LL_ADC_PATH_INTERNAL_VREFINT);
  /** Configure Internal Channel 
  */
  LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), ADC_CHANNEL_VREFINT);
  /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) 
  */

But Vref not worked (ADC->CCR bit VREFEN is 0 and ADC->CHESEL bit CHESEL17 is 0)

Correct code is:

static void MX_ADC_Init(void)
{
...
/** Configure Regular Channel 
 * LL_ADC_PATH_INTERNAL_VREFINT change to LL_ADC_CHANNEL_VREFINT
  */
   LL_ADC_REG_SetSequencerChAdd(ADC1,LL_ADC_CHANNEL_VREFINT); //Fixed!
  /** Configure Internal Channel 
  *  ADC_CHANNEL_VREFINT change to LL_ADC_CHANNEL_VREFINT
  */ 
  LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_CHANNEL_VREFINT); //Fixed!

For fix it on my application I add next code:

#define ADC_CHANNEL_VREFINT ADC_CCR_VREFEN
...
static void MX_ADC_Init(void)
{
...
/* USER CODE BEGIN ADC_Init 2 */
   LL_ADC_REG_SetSequencerChAdd(ADC1,LL_ADC_CHANNEL_VREFINT); //Fixed!
  /* USER CODE END ADC_Init 2 */

My Cube version 5.1.0 (downloaded at march 21 2019)

Configuration in Cube:

0690X0000088R48QAE.png

1 REPLY 1

Bug still present in most recent version of STM32CubeMX 6.7.0! I had the same issue with the STM32L431RCT6! ST should fix this bug!