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DMA Overhead (ADC to RAM)

Gudgel.boB
Senior

STM32F446 in my case...

When the ADC finishes a conversion and the DMA controller deposits the converter data into memory, what is the overhead ? i.e. How long does it take ? Is this shown in the documentation anywhere ?

I would assume that as soon as the A2D conversion is done, the DMA is triggered and if the RAM address and data bus is free, the DMA controller takes over, deposits the value and releases the busss and that's it. Is that correct ?

And why are interrupts generated ? I would think this could all happen without an interrupt taking up more resources ? CUBE added all that for me.

I do notice that at least for ADC1, commenting out the two interrupt lines did not keep the converted data from appearing at the correct locations as far as I can tell.

Still working on getting ADC2 and ADC2 going with their 2 or 3 streams. ADC1 values are getting screwed up when I enable those but I think I'm making some progress to that goal.

Thanks

3 REPLIES 3
turboscrew
Senior III
AvaTar
Lead

> When the ADC finishes a conversion and the DMA controller deposits the converter data into memory, what is the overhead ? i.e. How long does it take ? Is this shown in the documentation anywhere ?

Check the DMA and bus matrix section of the reference manual, including the interconnections. That includes priorities.

> And why are interrupts generated ?

Usually timing and coherence. I prefer an interrupt for a set of ADC channels converted. Or, you can configure an interrupt for number of sets transferred.

This is usually required for equidistant sampling and processing of analogue data.

The older SPL examples used to employ a simpler method, with continuous sampling and DMA without notification (TC interrupt). In cases where you don't need a temporal relation.

> Still working on getting ADC2 and ADC2 going with their 2 or 3 streams. ADC1 values are getting screwed up when I enable those but I think I'm making some progress to that goal.

I used the DMA TC interrupt to move the ADC results to another buffer, before the next transfer triggers - this next conversion results will start to overwrite the current one without further notice.

With Cube's nature of callbacks in interrupt context, I can easily understand how this happens.

Gudgel.boB
Senior

Thanks guys. I may have had that app note somewhere but that's what I probably need.

Yeah, I probably generated the initialization code with the CUBE app.

So, the interrupt can have some reasons to use as AvaTar mentioned.

As long as my A/D conversions are fast enough, I should not have to worry about separate interrupts to sync or retrieve data. My timer interrupt can handle all those in one.