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Breakpoints change behavior when accessing external memory !

ranran
Senior II

Hello,

I have a very weird behavior...

When trying to access external synchronous PSRAM.

I see the clock and cs change only if I stop and starts stepping inside the while(1) loop below.

When doing "go", there is no clock nor CS changes.

I tried to add delays as you can see, but nothing helps.

#define FPGA_BANK_ADDR 0x64000000
 
__IO uint8_t  value;
__IO uint8_t * volatile psramaddress = (__IO uint8_t volatile*)FPGA_BANK_ADDR+2;
while(1)
{
 *psramaddress = value++; 
 rd_2 = *psramaddress ; 
HAL_Delay(500);
}

Is there any idea ?

Thanks

1 ACCEPTED SOLUTION

Accepted Solutions
ranran
Senior II

Seems to be like we missed the transaction in scope , and only saw the first transaction for some reason (altough not in trigger mode).

Becuase in software/code, we did have succeeded in continous all registers from fpga, which means that clock transaction, and CS must have toggled for each transaction.

View solution in original post

2 REPLIES 2

Check caching, buffering and sharing setting for memory region and try changing MPU settings.​

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ranran
Senior II

Seems to be like we missed the transaction in scope , and only saw the first transaction for some reason (altough not in trigger mode).

Becuase in software/code, we did have succeeded in continous all registers from fpga, which means that clock transaction, and CS must have toggled for each transaction.