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SDRAM HardFault

Chuev.Vladimir
Associate III

I use AS4C8M32SA-6BIN on my board (https://www.alliancememory.com/wp-content/uploads/pdf/dram/Alliance%20Memory_256M%20SDRAM_AS4C8M32SA-6_7BIN(BCN)%20A%20die_rev%201.0%20November%202016.pdf)

But I get HardFault when I try to write to the address 0xD0000000

I don't understand what did wrong

0690X000006CpbfQAC.png

0690X000006CoyiQAC.png0690X000006CoyYQAS.png

Here's my code I removed all the unnecessary for clarity

// AS4C8M32SA-6BIN
#define SDRAM_MODEREG_BURST_LENGTH_1             ((uint16_t)0x0000)
#define SDRAM_MODEREG_BURST_LENGTH_2             ((uint16_t)0x0001)
#define SDRAM_MODEREG_BURST_LENGTH_4             ((uint16_t)0x0002)
#define SDRAM_MODEREG_BURST_LENGTH_8             ((uint16_t)0x0003)
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL      ((uint16_t)0x0000)
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED     ((uint16_t)0x0008)
#define SDRAM_MODEREG_CAS_LATENCY_2              ((uint16_t)0x0020)
#define SDRAM_MODEREG_CAS_LATENCY_3              ((uint16_t)0x0030)
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD    ((uint16_t)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE     ((uint16_t)0x0200)
 
#define SDRAM_REFRESH_COUNT                   	 ((uint32_t)4096)
 
 
void SdramInitSequence() {
	FMC_SDRAM_CommandTypeDef command;
 
	command.CommandMode =	FMC_SDRAM_CMD_CLK_ENABLE;
	command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
	command.AutoRefreshNumber = 1;
	command.ModeRegisterDefinition = 0;
	HAL_SDRAM_SendCommand(&hsdram1, &command, 0xFFFF);
 
	HAL_Delay(1);
 
	command.CommandMode =	FMC_SDRAM_CMD_PALL;
	command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
	command.AutoRefreshNumber = 1;
	command.ModeRegisterDefinition = 0;
	HAL_SDRAM_SendCommand(&hsdram1, &command, 0xFFFF);
 
	command.CommandMode =	FMC_SDRAM_CMD_AUTOREFRESH_MODE;
	command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
	command.AutoRefreshNumber = 8;
	command.ModeRegisterDefinition = 0;
	HAL_SDRAM_SendCommand(&hsdram1, &command, 0xFFFF);
 
	command.CommandMode =	FMC_SDRAM_CMD_LOAD_MODE;
	command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
	command.AutoRefreshNumber = 1;
	command.ModeRegisterDefinition = 
		SDRAM_MODEREG_BURST_LENGTH_1 | \
		SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL | \
		SDRAM_MODEREG_CAS_LATENCY_2 | \
		SDRAM_MODEREG_OPERATING_MODE_STANDARD | \
		SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
	HAL_SDRAM_SendCommand(&hsdram1, &command, 0xFFFF);
 
	HAL_SDRAM_ProgramRefreshRate(&hsdram1, SDRAM_REFRESH_COUNT);
}
 
 
 
 
int main(void) {
	MPU_Config();
	SCB_EnableICache();
	SCB_EnableDCache();
 
	HAL_Init();
	SystemClock_Config();
	MX_GPIO_Init();
	MX_FMC_Init();
 
 
 
	SdramInitSequence();
 
 
	// HardFault
	*(__IO uint32_t*)(0xD0000000) = 0xAFAFAFAF;
 
	while(1);
}
 
 
 
 
static void MX_FMC_Init(void) {
	FMC_SDRAM_TimingTypeDef SdramTiming;
 
	/** Perform the SDRAM1 memory initialization sequence */
	hsdram1.Instance = FMC_SDRAM_DEVICE;
 
	/* hsdram1.Init */
	hsdram1.Init.SDBank =			FMC_SDRAM_BANK1;
	hsdram1.Init.ColumnBitsNumber =		FMC_SDRAM_COLUMN_BITS_NUM_9;
	hsdram1.Init.RowBitsNumber =		FMC_SDRAM_ROW_BITS_NUM_12;
	hsdram1.Init.MemoryDataWidth =		FMC_SDRAM_MEM_BUS_WIDTH_32;
	hsdram1.Init.InternalBankNumber =	FMC_SDRAM_INTERN_BANKS_NUM_4;
	hsdram1.Init.CASLatency =		FMC_SDRAM_CAS_LATENCY_2;
	hsdram1.Init.WriteProtection =		FMC_SDRAM_WRITE_PROTECTION_DISABLE;
	hsdram1.Init.SDClockPeriod =		FMC_SDRAM_CLOCK_PERIOD_2;
	hsdram1.Init.ReadBurst =		MC_SDRAM_RBURST_ENABLE;
	hsdram1.Init.ReadPipeDelay =		FMC_SDRAM_RPIPE_DELAY_0;
 
	/* SdramTiming */
	SdramTiming.LoadToActiveDelay =		2;
	SdramTiming.ExitSelfRefreshDelay =	7;
	SdramTiming.SelfRefreshTime =		7;
	SdramTiming.RowCycleDelay =		6
	SdramTiming.WriteRecoveryTime =		4;
	SdramTiming.RPDelay =			3;
	SdramTiming.RCDDelay =			3;
 
	if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK) {
		_Error_Handler(__FILE__, __LINE__);
	}
}
 
 
 
 
void MPU_Config(void) {
	MPU_Region_InitTypeDef MPU_InitStruct;
 
	/* Disables the MPU */
	HAL_MPU_Disable();
 
	/**Initializes and configures the Region and the memory to be protected */
	MPU_InitStruct.Enable =			MPU_REGION_ENABLE;
	MPU_InitStruct.Number =			MPU_REGION_NUMBER0;
	MPU_InitStruct.BaseAddress =		0xD0000000;
	MPU_InitStruct.Size =			MPU_REGION_SIZE_32MB;
	MPU_InitStruct.SubRegionDisable =	0x0;
	MPU_InitStruct.TypeExtField =		MPU_TEX_LEVEL0;
	MPU_InitStruct.AccessPermission =	MPU_REGION_FULL_ACCESS;
	MPU_InitStruct.DisableExec =		MPU_INSTRUCTION_ACCESS_ENABLE;
	MPU_InitStruct.IsShareable =		MPU_ACCESS_NOT_SHAREABLE;
	MPU_InitStruct.IsCacheable =		MPU_ACCESS_CACHEABLE;
	MPU_InitStruct.IsBufferable =		MPU_ACCESS_NOT_BUFFERABLE;
 
	HAL_MPU_ConfigRegion(&MPU_InitStruct);
 
	/* Enables the MPU */
	HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
}

2 REPLIES 2
GGher
Associate II

did you find the solution? I have a similar issue.

Isn't BANK1 at 0xC0000000 ?

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