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RNG_CLK Configuration

Cevdet
Associate III

Hello 

I want to generate random numbers as using registers, not the libraries.

I read the RM0090 and wrote the code at the attachment. But I could not configure the RNG_CLK.

So I want to know how to configure RNG_CLK.

[IAR Embedded Workbench]

8 REPLIES 8

RNG is connected to the same clock as USB, so you need to have PLL set up so that it outputs around 48MHz on its Q output.

JW

RNG is connected to the same clock as USB, so you need to have PLL set up so that it outputs around 48MHz on its Q output.

JW

Thanks for support pal:) I can generate the random number. But it looks like there is a clock problem again.. The CEIS bit is still HIGH.. I do not know how to fix it..

*(unsigned int*)0x50060804=0x21

The clock was not correct previously and CEIS remembers it; but it's now OK as CECS is not set. See description of RNG_SR register in RM.

Just clear CEIS and you should be fine.

JW

I cannot clear the CEIS bit. It says the CEIS bit is rc_w0. How do I write '0' to this bit?

I use IAR Embedded Workbench

If I press to "Download and Debug" button and then "Go" button, the RNG_SR=0x21

If I press to "Download and Debug" button and then "Step Over" button a couple of times, the RNG_SR=0x1, so it works.

But what is this suppose to mean?

> I cannot clear the CEIS bit. It says the CEIS bit is rc_w0. How do I write '0' to this bit?

You can write 0 to the whole register.

> But what is this suppose to mean?

I don't know. I don't use IAR and I never investigated the status bits of RNG.

JW

I have already tried write 0 to whole register, it did not work!

Thank you for helping .. I keeo trying to fix it.

If you're getting clock errors perhaps better explain the RNG_CLK and AHB clocks you're using here. Decode the setting so you can see what might be happening. Don't see PLL setup or any code to replicate or analyze.

Perhaps try an existing example

STM32Cube_FW_F4_V1.18.0\Projects\STM324xG_EVAL\Examples\RNG\RNG_MultiRNG

Sure debugger probing not causing issues? Perhaps output diagnostic/telemetry rather than stall and single-step.

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