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SOLVED - X Nucleo PLC01A1 : porting to F7

Lagodolio
Senior

After writing some code for PLC01A1 and STM32 F446RE, I'm trying to port it on my F767ZI.

PLC Board uses SPI PA5, PA6 and PA7 for CLK, MISO and MOSI, and F4 & F7 have the same pinout.

In addition PLS01A1 uses F4's PB10,PB6 and PC7, but the same pins are named PE9,PD14 and PD15 on F7.

To sum:

F4 F7

B10 E9

B6 D14

C7 D15.

I changed x_nucleo_plc01a1.h given by STM so I have:

.....
 
#define X_NUCLEO_SPI_EXPBD_CLK_ENABLE() __SPI1_CLK_ENABLE()
#define X_NUCLEO_SPI_EXPBD_MISO_PIN     GPIO_PIN_6
#define X_NUCLEO_SPI_EXPBD_MISO_PORT    GPIOA
 
#define X_NUCLEO_SPI_EXPBD_MOSI_PIN     GPIO_PIN_7
#define X_NUCLEO_SPI_EXPBD_MOSI_PORT    GPIOA
 
#define X_NUCLEO_SPI_EXPBD_SCK_PIN      GPIO_PIN_5
 
#define X_NUCLEO_SPI_EXPBD_SCK_PORT    GPIOA
 
#define X_NUCLEO_TIM_PRESCALER          749
  
#define VNI8200XP_CS_CLK_ENABLE()       __GPIOC_CLK_ENABLE();
#define VNI8200XP_CS_PIN                GPIO_PIN_7
#define VNI8200XP_CS_PORT               GPIOC
 
//NEW F7 Values
#define VNI8200XP_OUT_EN_CLK_ENABLE()   __GPIOE_CLK_ENABLE();
#define VNI8200XP_OUT_EN_PIN            GPIO_PIN_9
#define VNI8200XP_OUT_EN_PORT           GPIOE
 
//OLD F4 Values
//#define VNI8200XP_OUT_EN_CLK_ENABLE()   __GPIOB_CLK_ENABLE();
//#define VNI8200XP_OUT_EN_PIN            GPIO_PIN_10
//#define VNI8200XP_OUT_EN_PORT           GPIOB
 
 
//NEW F7 Values
#define CLT01_38S_CS_CLK_ENABLE()       __GPIOD_CLK_ENABLE();
#define CLT01_38S_CS_PIN                GPIO_PIN_14
#define CLT01_38S_CS_PORT               GPIOD
 
//OLD F4 Values
//#define CLT01_38S_CS_CLK_ENABLE()       __GPIOB_CLK_ENABLE();
//#define CLT01_38S_CS_PIN                GPIO_PIN_6
//#define CLT01_38S_CS_PORT               GPIOB
 
//NEW F7 Values
#define VNI8200XP_RESET_PORT            GPIOD
#define VNI8200XP_RESET_PIN             GPIO_PIN_15
 
#define VNI8200XP_ENABLE_PORT           GPIOE
#define VNI8200XP_ENABLE_PIN            GPIO_PIN_9
 
//OLD F4 Values
//#define VNI8200XP_RESET_PORT            GPIOC
//#define VNI8200XP_RESET_PIN             GPIO_PIN_7 
   
//#define VNI8200XP_ENABLE_PORT           GPIOB
//#define VNI8200XP_ENABLE_PIN            GPIO_PIN_10
  .....

The code (that is the same used for F4, with "f4xx*.h" headers substituted by "f7xx*.h") is correctly compiled but PLC doesn't work ...

GPIO B10,B6 &C7 seem used as generic GPIO, but PLC01A1 is declarated compatible with F1,F3 and F4 and F7 isn't named so: is it possible that xnucleo doesn't work on F7?

Thanks far all,

Mario

1 REPLY 1
Lagodolio
Senior

SOLVED!

I didn't correct initial values...

:o

#define VNI8200XP_CS_CLK_ENABLE()       __GPIOC_CLK_ENABLE();
#define VNI8200XP_CS_PIN                GPIO_PIN_7
#define VNI8200XP_CS_PORT               GPIOC

Now I correct it with:

 //NEW F7 Values
#define VNI8200XP_CS_CLK_ENABLE()       __GPIOD_CLK_ENABLE();
#define VNI8200XP_CS_PIN                GPIO_PIN_15
#define VNI8200XP_CS_PORT               GPIOD
 
 //OLD F4 Values
//#define VNI8200XP_CS_CLK_ENABLE()       __GPIOC_CLK_ENABLE();
//#define VNI8200XP_CS_PIN                GPIO_PIN_7
//#define VNI8200XP_CS_PORT               GPIOC

and works!!