Hi,
Using the following code, ADC can be triggered by TIM22 successfully.
/**
* @fn static void ADC_Config(void)
*
* @brief ADC configuration.
*/
static void ADC_Config(void)
{
/* Enable clock */
RCC->AHBENR |= RCC_AHBENR_DMAEN;
RCC->APB2ENR |= RCC_APB2ENR_ADCEN;
RCC->APB2ENR |= RCC_APB2ENR_TIM22EN;
/* ADC Init */
ADC1->CR |= ADC_CR_ADCAL;
while (!(ADC1->ISR & ADC_ISR_EOCAL));
ADC1->ISR |= ADC_ISR_EOCAL;
ADC1->CFGR1 = ADC_CFGR1_EXTEN_0 | 4 << ADC_CFGR1_EXTSEL_Pos | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN;
ADC1->CFGR2 = ADC_CFGR2_TOVS | 3 << ADC_CFGR2_OVSS_Pos | 2 << ADC_CFGR2_OVSR_Pos | ADC_CFGR2_OVSE;
ADC1->SMPR = ADC_SMPR_SMP_0 | ADC_SMPR_SMP_1 | ADC_SMPR_SMP_2;
ADC1->CHSELR = ADC_CHSELR_CHSEL0 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL18;
ADC->CCR = ADC_CCR_TSEN | ADC_CCR_VREFEN;
ADC1->ISR |= ADC_ISR_ADRDY;
ADC1->CR |= ADC_CR_ADEN;
while (!(ADC1->ISR & ADC_ISR_ADRDY));
/* DMA Init */
DMA1_CSELR->CSELR |= 0 << DMA_CSELR_C1S_Pos;
DMA1_Channel1->CPAR = (uint32_t)&ADC1->DR;
DMA1_Channel1->CMAR = (uint32_t)AnBuf;
DMA1_Channel1->CNDTR = 3;
DMA1_Channel1->CCR = DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TCIE;
DMA1_Channel1->CCR |= DMA_CCR_EN;
/* TIM Init */
TIM22->CR2 = 2 << TIM_CR2_MMS_Pos;
TIM22->PSC = 1 - 1;
TIM22->ARR = 667 - 1;
TIM22->CR1 |= TIM_CR1_CEN;
/* Enable ADC */
NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
NVIC_EnableIRQ(DMA1_Channel1_IRQn);
ADC1->CR |= ADC_CR_ADSTART;
}
However, when I use TIM21 instead of TIM22, ADC is not triggered. According to P.285 of RM0377, TIM21 trigger is not available for category 1 device, but the device I'm using (STM32L051K6T6) is in category 3.
Any one can help me on this ?
Regards,
