I cannot get timer 1 channels 3 or 4 to output a PWM. Here is how I have it initialized
static void _vBl_initGauge_PWM(void)
{
TIM1->PSCRH = (u8)((sBL_PWMoutConst.PSCR >> 8) & 0xFF);
TIM1->PSCRL = (u8)sBL_PWMoutConst.PSCR;
TIM1->ARRH = (u8)(sBL_PWMoutConst.ARR >> 8);
TIM1->ARRL = (u8)sBL_PWMoutConst.ARR;
// Set active high polarity
TIM1->CCER2 &= (u8)~TIM1_CCER2_CC4P;
// Set output compare mode to PWM mode 1
TIM1->CCMR4 &= (u8)~TIM1_CCMR_OCM;
TIM1->CCMR4 |= (u8)0x60;
// Enable the preload register
TIM1->CCMR4 |= (u8)TIM1_CCMR_OCxPE;
// Set the duty cycle to 50%
TIM1->CCR4H = (u8)(sBL_PWMoutConst.ARR >> 9); // This values should be half of the PWM_ reload register
TIM1->CCR4L = (u8)(sBL_PWMoutConst.ARR >> 1); // value in order to produce a 50% duty cycle
// Enable the timer
TIM1->CR1 |= (u8)TIM1_CR1_CEN;
// Enable the output
TIM1->CCER2 |= (u8)TIM1_CCER2_CC4E;
}
What am I doing wrong?
