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When starting from bank1 watchdog hangs cpu

rickard
Associate II
Posted on July 24, 2008 at 05:37

When starting from bank1 watchdog hangs cpu

5 REPLIES 5
rickard
Associate II
Posted on May 17, 2011 at 09:53

When I'm running my main program in bank 0 and boots from bank 0 the program will reset when the watchdog is not trigged in the watchdog interval.

But when I'm running my bootloader in bank1 and the watchdog is not trigged in the watchdog interval the cpu will hang and never reset.

When I'm starting my bootloader in bank 1 and then switches to bank 0 the watchdog will also hang the cpu.

When the watchdog is resetting in bank 0 the cpu shall be reset to bank 1. How to do this? Is done automatically since the watchdog changes the bank to the boot bank? Or must something be done to achieve this?

I am using revision H of the ARM STR912FW44 where a silicon bug when using watchdog after switch have been fixed.

My guess is that something is wrong in the startup files. I attach the startup files for bank 0 and bank 1.

What is wrong? How can the watchog hang the cpu? Could the reset address be wrong?

[ This message was edited by: rickard.thorstensson on 23-07-2008 08:27 ]

rickard
Associate II
Posted on May 17, 2011 at 09:53

Update:

When setting RESET_INn pin to 0 the cpu also hangs.

When the cpu has hanged, the cpu doesn't respond to JTAG and the power must be cut to establish JTAG connection.

The problem seems to be in System Reset and not in the watchdog.

Is there something in my startup files which corrupts System Reset??

[ This message was edited by: rickard.thorstensson on 12-05-2008 13:06 ]

rickard
Associate II
Posted on May 17, 2011 at 09:53

Another update.

I've contacted ST and got the following answer:

''I don't recommend you to dynamically switch between banks 0 and 1. Implement a dynamic vector jump table (eg. in RAM) and forward the FIQ, IRQ and other vectors to user application instead.

Remapping causes beforementioned issues. Boot always from Boot Bank 1 mapped as first 32 kB of address range.

One thing must be considered - MCU always boots into a bootloader and jumps afterwards to the main application. Main application is responsible for updating vector addresses either in VICs or in RAM jump table.''

I don't know how to do this. All examples I've seen with bootloader and application changes bank but this is apparently wrong. Has anyone made the bootloader to application switch as described above?

My bankswitch is made like this:

FMI->BBSR = 0x0; //Boot bank size 32k (bank1)

FMI->NBBSR = 0x6; //Non boot bank size 512k (bank0)

FMI->BBADR = 0x00000 >> 2; //Boot bank start address

FMI->NBBADR = 0x80000 >> 2; //Non boot bank start address

FMI->CR |= 0x18; //Enable Bank0 & Bank1

Jump_To_Application = (pJumpFunction) 0x00080000;

Jump_To_Application();

mark9
Associate II
Posted on May 17, 2011 at 09:53

I also saw problems with watchdogs hanging the processor, but I think this is unrelated to bank switching. I think there is a bug in the watchdog reset hardware.

The errata mentions that you should not switch banks, because there is a bug in the hardware reset circuitry, which resets *some* but not all of the require registers on a hard external reset. This causes the PC to jump into the weeds. Unfortunately, ST hasn't updated their bootloader example!

The solution is to put BANK1 at 0x0000000 and BANK0 at 0x00008000 (or higher). You can hard code the vector table (ie IRQ mostly) to jump to an address in BANK0, and don't use interrupts in the bootloader.

rickard
Associate II
Posted on May 17, 2011 at 09:53

The problem is that I need to use interrupts in bootloader and the application.

I really don't know how to solve this problem. Any other suggestions?