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problem with B DMA2_Stream0_IRQHandler

karouimaroua88
Associate II
Posted on May 03, 2013 at 00:00

Hello ,

I still novice in embedded programming and when i use DMA transfer between memories the program is blocked on ''B DMA2_Stream0_IRQHandler'' in the file startup_stm32f4xx.s

please it's urgent i need help !!

this is my code :

while(1)

{

 USART_ClearFlag(USART2,  USART_FLAG_TXE);

  USART_ClearFlag(USART2, USART_FLAG_RXNE);

if (USART_GetFlagStatus(USART2, USART_FLAG_TXE) != RESET)

    USART_SendData(USART2, Txvalue);

  if (USART_GetFlagStatus(USART2, USART_FLAG_RXNE) != RESET)

    RxValue = USART_ReceiveData(USART2);

     tab_src[0]=RxValue;  // tab_src[0] contains the data to be transferd to flash memory via                                                  // DMA

      EXTI_GenerateSWInterrupt(EXTI_Line0);  //ISR generated when i press button to send                                                                               // data to flash memory 

       EXTILine0_Config();  

       }

void DMA_Config(void)

{

  NVIC_InitTypeDef NVIC_InitStructure;

  DMA_InitTypeDef  DMA_InitStructure;

  __IO uint32_t    Timeout = TIMEOUT_MAX;

  /* Enable DMA clock */

  RCC_AHB1PeriphClockCmd(DMA_STREAM_CLOCK, ENABLE);

  /* Reset DMA Stream registers (for debug purpose) */

  DMA_DeInit(DMA_STREAM);

  /* Check if the DMA Stream is disabled before enabling it.

     Note that this step is useful when the same Stream is used multiple times:

     enabled, then disabled then re-enabled... In this case, the DMA Stream disable

     will be effective only at the end of the ongoing data transfer and it will

     not be possible to re-configure it before making sure that the Enable bit

     has been cleared by hardware. If the Stream is used only once, this step might

     be bypassed. */

  while (DMA_GetCmdStatus(DMA_STREAM) != DISABLE)

  {

  }

  /* Configure DMA Stream */

  DMA_InitStructure.DMA_Channel = DMA_CHANNEL;

  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)tab_src;

  DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)tab_dst;

  DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory;

  DMA_InitStructure.DMA_BufferSize = (uint32_t)BUFFER_SIZE;

  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;

  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;

  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;

  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;

  DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;

  DMA_InitStructure.DMA_Priority = DMA_Priority_High;

  DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;

  DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;

  DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;

  DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;

  DMA_Init(DMA_STREAM, &DMA_InitStructure);

  /* Enable DMA Stream Transfer Complete interrupt */

  DMA_ITConfig(DMA_STREAM, DMA_IT_TC, ENABLE);

  /* DMA Stream enable */

  DMA_Cmd(DMA_STREAM, ENABLE);

 

  /* Check if the DMA Stream has been effectively enabled.

     The DMA Stream Enable bit is cleared immediately by hardware if there is an

     error in the configuration parameters and the transfer is no started (ie. when

     wrong FIFO threshold is configured ...) */

  Timeout = TIMEOUT_MAX;

  while ((DMA_GetCmdStatus(DMA_STREAM) != ENABLE) && (Timeout-- > 0))

  {

  }

  /* Check if a timeout condition occurred */

  if (Timeout == 0)

  {

    /* Manage the error: to simplify the code enter an infinite loop */

    while (1)

    {

    }

  }

void EXTI0_IRQHandler(void)

{

  if(EXTI_GetITStatus(EXTI_Line0) != RESET)

  {

   

         DMA_Config();

          EXTI_ClearITPendingBit(EXTI_Line0);

        

  }

}

   //Enable the DMA Stream IRQ Channel 

  NVIC_InitStructure.NVIC_IRQChannel = DMA_STREAM_IRQ;

  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;

  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;

  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

  NVIC_Init(&NVIC_InitStructure);

}

thank you 

}

 
5 REPLIES 5
Posted on May 03, 2013 at 00:42

You'll need to supply an DMA2_Stream0_IRQHandler() routine to service the TC interrupt you've generated. The branching code in startup.s is a place holder in the absence of a routine supplied by you.

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karouimaroua88
Associate II
Posted on May 03, 2013 at 00:53

Sorry i did not understand you can you more explain please 

Posted on May 03, 2013 at 01:09

USART2 DMA TX example 1/2 way down, USART3 DMA TX/RX 3/4 way down

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karouimaroua88
Associate II
Posted on May 04, 2013 at 16:05

Thanks clive1 for your response .

I have just one more question :how can i disable the dma transfert because when i push button to send data from SRAM  to flash memory it works and still sending even when i don't push button , what i want exactly is transmitting data when a push button interrupts happens .

Have you any idea about that? 

Posted on May 04, 2013 at 16:24

I'm not sure I understand what's going on, or the purpose.

You mention a button, but you don't configure a GPIO, but rather try to generate an interrupt when you receive a USART input. There are more practical ways to do that.

I'm also not sure of the efficacy of doing DMA from RAM to FLASH. The flash really doesn't permit writes to occur in that fashion.

I also don't quite understand the transfer length of the buffer, or where that transfer would stick, or persist, or how you're checking for that. A write to flash might cause the DMA unit to fault.
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