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SPC560 - SWT

ssk
Associate II
Posted on August 12, 2015 at 15:03

Hello,

I am using software watchdog timer (SWT) for the SPC560D40 MCU. What is the 'out of reset' situation for the SWT?

Best Regards,

Mike.

#swt
5 REPLIES 5
Erwan YVIN
ST Employee
Posted on August 17, 2015 at 11:44

Hello Mike ,

it depends of your configuration :

on SWT_CR, there is a bit to set your ''out of reset''

ITR

Interrupt Then Reset.

0 = Generate a reset on a time-out

1 = Generate an interrupt on an initial time-out, reset on a second consecutive time-out

Best regards

                     Erwan

ssk
Associate II
Posted on August 18, 2015 at 10:02

As per reference manual, the reset state for ITR is 0 i.e. generate a reset on timeout but What will be the default value used to decide the timeout (before it is initialized to some value)?

Best Regards,

Mike.

Erwan YVIN
ST Employee
Posted on August 19, 2015 at 13:58

Hello Mike ,

The default value is 

Default counter value (SWT_TO_RST) is 1280 (0x00000500 hexadecimal)

which

correspond to around 10 ms with a 128 kHz clock.

    Best Regards

                      Erwan

ssk
Associate II
Posted on August 19, 2015 at 16:38

The default value is considering 128KHz clock but I am using 8MHz external XTAL. In this case what will be the value for timeout at the time of reset?

Mike.

Erwan YVIN
ST Employee
Posted on August 24, 2015 at 11:21

Hello Mike ,

The unique SWT counter clock is the undivided slow internal RC oscillator 128 kHz

(SIRC), no other clock source can be selected

   Best Regards

                 Erwan