using ch1..ch4 channel of TIM5

[bsimone]

Posted on April 27, 2013 at 17:44

Hello,

I'd like to use 4 channels of TIM5 as independent pulse counter, but CCR1..4 seems to have some non-sense value. Here's the code:

void
TIM5_Init(
void
)
{
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
TIM_ICInitTypeDef TIM_ICInitStructure; 
/* Structure for Timer Input Capture init */
/* TIM5 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE);
/* GPIOH, GPIOI clock enable */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOH, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOI, ENABLE);
/* TIM5 channel1,2,3,4 configuration : PH.10 PH.11 PH.12 PI.0*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOH, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOI, &GPIO_InitStructure);
/* Connect TIM pin to AF2 */
GPIO_PinAFConfig(GPIOH, GPIO_PinSource10, GPIO_AF_TIM5);
GPIO_PinAFConfig(GPIOH, GPIO_PinSource11, GPIO_AF_TIM5);
GPIO_PinAFConfig(GPIOH, GPIO_PinSource12, GPIO_AF_TIM5);
GPIO_PinAFConfig(GPIOI, GPIO_PinSource0, GPIO_AF_TIM5);
TIM_TimeBaseStructure.TIM_Period = 0xFFFFFFFF; 
TIM_TimeBaseStructure.TIM_Prescaler = 0; 
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; 
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM5, &TIM_TimeBaseStructure);
TIM_ICInitStructure.TIM_Channel = TIM_Channel_1;
TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
TIM_ICInitStructure.TIM_ICFilter = 0x00;
TIM_ICInit(TIM5, &TIM_ICInitStructure);
TIM_ICInitStructure.TIM_Channel = TIM_Channel_2;
TIM_ICInit(TIM5, &TIM_ICInitStructure);
TIM_ICInitStructure.TIM_Channel = TIM_Channel_3;
TIM_ICInit(TIM5, &TIM_ICInitStructure);
TIM_ICInitStructure.TIM_Channel = TIM_Channel_4;
TIM_ICInit(TIM5, &TIM_ICInitStructure);
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1); 
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; 
NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; 
NVIC_Init(&NVIC_InitStructure);
// TIM_TIxExternalClockConfig(TIM5, TIM_TIxExternalCLK1Source_TI1, TIM_ICPolarity_Rising, 0); //TI2FP2
TIM_ITConfig(TIM5, TIM_IT_CC1 | TIM_IT_CC2 | TIM_IT_CC3 | TIM_IT_CC4, ENABLE); 
/* enable CC-interrupts */
TIM_Cmd(TIM5, ENABLE); 
}
void
TIM5_IRQHandler(
void
)
{
if
(TIM5->SR & TIM_IT_CC1) { 
/* input capture channel1? */
TIM5->SR = ~TIM_IT_CC1; 
/* Clear interrupt pending bit */
}
if
(TIM5->SR & TIM_IT_CC2) { 
/* input capture channel2? */
TIM5->SR = ~TIM_IT_CC2; 
/* Clear interrupt pending bit */
}
if
(TIM5->SR & TIM_IT_CC3) { 
/* input capture channel3? */
TIM5->SR = ~TIM_IT_CC3; 
/* Clear interrupt pending bit */
}
if
(TIM5->SR & TIM_IT_CC4) { 
/* input capture channel4? */
TIM5->SR = ~TIM_IT_CC4; 
/* Clear interrupt pending bit */
}
}

[Tesla DeLorean]

Posted on April 27, 2013 at 19:58

How about describing the wave forms applied, the observed results, and expected results.

Remember the TIM only has a SINGLE COUNTER.

[bsimone]

Posted on April 27, 2013 at 20:10

I apply a square wave signal @1kHz to each pin.

Then every X milliseconds (using another timer) I'm going to read CCR1, CCR2, CCR3, and CCR4. For example if I apply 1kHz square wave signal to PH10 and I check CCR1, I expect to read 1000, but what I read is a (random?) value, for example 87317494. btw, you said there's a single counter, so I need to change the approach, so to count pulses on 4 different GPIOs I need 4 different timers, is it?

[Tesla DeLorean]

Posted on April 27, 2013 at 20:20

The counter looks to be clocking at 84 MHz

Reading CCRx will give you relative phase of the channels. ie in 84 MHz ticks You should get a CCx interrupt each time a channel latches. You could count the interrupts?

[bsimone]

Posted on April 27, 2013 at 20:57

If I count the interrupts I get a value <1000 but not stable (sometimes values like 70, sometimes values close to 1000). Sounds strange...

I misstyped CCR value in previuos post and values are near 84000000 (i.e. 83717494)