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Timer overflow when in PWM mode?

Miro Nohaj
Associate II
Posted on May 20, 2013 at 09:18

Hello,

I'm running my code on STM32F103 chip, I've set up a PWM output from timer1 with period of 200 ms, pulse width 5 ms, it's working and can be seen with a scope on GPIOA_8. The thing is, that I want to do something when the timer overflows, on each overflow I toggled GPIOA_10, like this:

while(1) {

WORD val = TIM1->SR;

if((val & 0x0001) == 0) { // no overflow? continue

continue;

}

TIM1->SR = val & 0xfffe; // clear UIF flag

if(GPIOA->ODR & (1 << 10)) {

GPIOA->BSRR = (1 << 26);

} else {

GPIOA->BSRR = (1 << 10);

}

}

The problem is that even though I see the GPIOA_8 do the PWM output nicely, I can see the UIF to be set only like once in 10 secods (that would be like 500 PWM cycles). First I thought that I'm missing the UIF flag somehow (is it reset back to 0 in PWM mode by HW?), so I did the same with the interrupt, and even the interrupt gets called only like once in 10 secods (can see it on scope on the 2nd channel, or even by watching the debugger stop at breakpoint). 

I've went through the forum and found out that I shouldn't use RMW to clear UIF flag, I can test that in the evening (don't have the hardware with me right now), but I guess that won't help too much. UDIS in the TIMx_CR1 register is 0 so the UIF should be generated. 

What am I missing? Does this behave differently when the timer is in PWM mode? 

Jookie
4 REPLIES 4
Posted on May 21, 2013 at 17:23

I was answering to a COMPLETELY DIFFERENT post/thread.

Posted on May 21, 2013 at 17:36

You're not masking bits, the clearing syntax is TIMx->SR = 0xFFFE; which implicitly clears the register bit (not like a memory access) in race free manner. Not sure of the impact of clearing bits you hadn't anticipated.

I'm not spinning in a loop waiting for an Update signal, but doing an Update interrupt every 200 ms shouldn't be an issue, and I haven't observed a problem doing so.
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Posted on May 21, 2013 at 18:01

That means it's time to ask for a minimal, but complete compilable code exhibiting the problem...

JW
Miro Nohaj
Associate II
Posted on May 22, 2013 at 08:29

I've found the problem this morning. It looked like something would be in TIM1->RCR because the UIF wasn't set on every update, but I didn't set anything and the RCR value after reset should be 0. I took a look with debugger and I've found out that RCR has some value (0x90 in one case), and it was caused by not initialized variable in the timer init structure - I've copied code from some PWM example which used peripheral library, just changed the PWM period and match value, which worked, but they didn't set this RCR in the structure and it had some random value... 

So... Thanks anyone for help 🙂 

Miro