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STM32F030F4P6 I2C Slave Transmitter Problem : TXI event triggered more times than requested by I2C master

guwono.septijo
Associate II
Posted on January 03, 2014 at 15:25

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5 REPLIES 5
guwono.septijo
Associate II
Posted on January 04, 2014 at 12:41

i have a nasty / tricky / stinky solution..

on flag TXI  :

  ....  bla bla

  if (I2C_GetITStatus(I2C1, I2C_IT_TXIS)) {

      jTX++;

      I2C_ClearITPendingBit(I2C1, I2C_IT_TXI);

      if (jTX > 2) {

         // without this delay below, the byte sent previously was gone !!

         uint16_t delay;

         for (delay = 0; delay < 0x100; delay++) {}

         // brutally kill I2C device and ressurect it

         // maybe not so nasty/stinky because it only

         //   needed to be done once, after MCU's resetted

         I2C_Cmd(I2C1,DISABLE);

         I2C_Cmd(I2C1,ENABLE);

      } else I2C_SendData(I2C1,jTX);

      return 0;

  }

is it a solution .. or not ? please advice...

update : it is not a solution. after killing I2C and ressurect it, the I2C becomes screwed !!

Posted on January 04, 2014 at 15:38

You have make a very comprehensive presentation, I'm not much into the F0, CooCox, or I2C, so I'm not sure I can give much advice in those regards.

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guwono.septijo
Associate II
Posted on January 04, 2014 at 16:17

i'm really very glad to see you in my thread, clive1

i just need a very little advice/info .. :

=> usually we send something using I2C_SendData(I2Cx, Data) in order to suppress TXI interruption....

my question is : how to CLEAR the TXI flag (Transmit Interrupt) without sending something .. !! ?? !!
Posted on January 06, 2014 at 13:34

RM0091, Rev4, 24.7.7 (I2Cx_ISR), Bit 1 TXIS: Transmit interrupt status (transmitters)

[...] Note: This bit is cleared by hardware when PE=0.

JW
guwono.septijo
Associate II
Posted on January 06, 2014 at 17:13

From: waclawek.jan

 

Posted: Monday, January 06, 2014 1:34 PM

 

Subject: STM32F030F4P6 I2C Slave Transmitter Problem : TXI event triggered more times than requested by I2C master

 

 

RM0091, Rev4, 24.7.7 (I2Cx_ISR), Bit 1 TXIS: Transmit interrupt status (transmitters)

 

[...] Note: This bit is cleared by hardware when PE=0.

 

 

JW

 

 

thanks JW for your Reply but still no luck...

I tried it with this :

I2C1->ISR &= (uint32_t)0xFFFFFFFD;

CMIIW ...

 

 

Clear PE flag (Bit 0 of I2C1->CR1 is exactly the same with

 

 

I2C_Cmd(I2C1,DISABLE);

 

 

(already in my ''nasty'' solution)

 

 

Others ?