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Multi DMA channel configuration

to_sam_kim
Associate II
Posted on November 06, 2013 at 23:06

Hi,

Last time, I programed multi channel ADC with channel0 of DMA2_stream0.

And now I try to add one more channel for USART with DMA2_stream0.

I know each DMA stream has maximum 8 channel and they share DMA_SxCR register for their detail configuration. 

My question is that how configure each channel for the different peripherals even if they share a same register(DMA2_stream0->CR).  

Should I initialize each DMA channel before they are used by a peripheral? like using ISR or call a DMA configuration function before enable the peripheral? 

Please give me the most common configuration of DMA with peripherals.

My goal is getting data from ADC from outside of the chip by using SPI with DMA and transfer data to PC by using USART with DMA.

 

Thanks you in advance for your help. 

 

**********************************************************

Below is my two DMA initial function. I'm thinking of call each of the function before the peripheral start

***********************************************************

void DMA_Init(void )

{

 RCC->AHB1ENR   |=(1UL<<22);   /* DMA2 clk Enable*/

 DMA2_Stream0->CR    &= ~(0x0E000000);       /* Channel 0 selected */

 DMA2_Stream0->CR    &= ~(0x01800000);    /*  Memory bust single*/

 DMA2_Stream0->CR    &= ~(0x00600000);    /*Peripheral bust single*/

 DMA2_Stream0->CR     |=  (2UL<<16)|       /* Priority level High */

                      (1UL<<13)|       /* Memory data size Half-word*/

                      (1UL<<11)|       /*Peripheral data size Half-word*/

                      (1UL<<10)|        /*Memory increment  enable */

                      (0UL<<9)|        /*Peripheral increment disable*/

                      (1UL<<8);        /*Circular mode enable*/

                      

 DMA2_Stream0->CR    &= ~(0x000000C0);     /*Direction Peripheral to Memory*/ 

 DMA2_Stream0->NDTR  =2;                /*Number of data items*/

  DMA2_Stream0->PAR  = (uint32_t) &ADC1->DR;    /*Peripheral base address*/

 DMA2_Stream0->M0AR = (uint32_t) &tmpADC1[0];  /*Memory 0 base address*/

 

 DMA2_Stream0->FCR = 0x00000021;             /*Direct mode and Threshold_HalfFull(Threshold not used) : same as reset value */

 

 DMA2_Stream0->CR    |= (1UL<<0);        /*DMA2_Stream0 Enable*/                

 

}

void DMA_Init2(void )       //DMA intial for USART6

{

 RCC->AHB1ENR   |=(1UL<<22);   /* DMA2 clk Enable*/

 DMA2_Stream0->CR    = 0;          /* Clear CR register */

 DMA2_Stream0->CR    |=    (0x04000000);       /* Channel 2 selected */

 DMA2_Stream0->CR    &= ~(0x01800000);    /*  Memory bust single*/

 DMA2_Stream0->CR    &= ~(0x00600000);    /*Peripheral bust single*/

 DMA2_Stream0->CR     |=  (2UL<<16)|       /* Priority level High */

                      (0UL<<13)|       /* Memory data size Byte*/

                      (0UL<<11)|       /*Peripheral data size Byte*/

                      (1UL<<10)|        /*Memory increment  enable */

                      (0UL<<9)|        /*Peripheral increment disable*/

                      (1UL<<8);        /*Circular mode enable*/

                      

 DMA2_Stream0->CR    |=(1UL<<6);             /*Direction Memory to peripheral*/ 

 DMA2_Stream0->NDTR  =8;                /*Number of data items*/

  DMA2_Stream0->PAR  = (uint32_t) &USART6->DR;    /*Peripheral base address*/

 DMA2_Stream0->M0AR = (uint32_t) &tmpUSART[0];  /*Memory 0 base address*/

 

 DMA2_Stream0->FCR = 0x00000021;             /*Direct mode and Threshold_HalfFull(Threshold not used) : same as reset value */

 

 DMA2_Stream0->CR    |= (1UL<<0);        /*DMA2_Stream0 Enable*/                

 

}

 

#usart #usart #discovery #discovery #stm32f4 #stm32f4 #stm32 #stm32
2 REPLIES 2
Posted on November 07, 2013 at 00:06

You get to pick ONE channel PER stream, you have EIGHT streams.

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to_sam_kim
Associate II
Posted on November 07, 2013 at 18:23

Thank you for your reply.

Now it makes sense. I thought I could handle total 64 DMA request with each DMA because there are Eight streams and each stream has 8 channels. The table in the reference makes me confuse a lot.

So, I have to pick each channel per stream then channel number of each stream shouldn't be same if they have same priority set in the register in order to avoid priority confliction. Correct?

Thanks again for your help.