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LdrEx, StrEx, ClrEx synchronization mechanism.

renon
Associate
Posted on March 02, 2016 at 02:16

 Hello everybody.

I can't understand the

  LdrEx, StrEx, ClrEx

 synchronization mechanism.

Error in documentation?

Let's look at the: 

   PM0056 Programming Manual.

   STM32F10xxx/20xxx/21xxx/L1xxxx

   Cortex-M3 programming manual

      DocID15491 Rev 5 May 2013

On the page 32 we have:

''......

The processor removes its exclusive access tag if:

�a It executes a CLREX instruction

�b It executes a Store-Exclusive instruction, regardless of whether the write succeeds.

�c An exception occurs. This means the

processor

can resolve semaphore conflicts

 

    between different threads.

 

......''

Let's focus on point ''c � An exception occurs''.

This is what I expect according to my common sense.

So I put:

    LdrEx, ..some code..., StrEx pair

and I trust that if other process drops between them via interrupt, processor removes the tag. Of course I will have to loop this sequence again but the exclusive access works well as the processor is responsible to remove the tag. Other words, there is no risk of mismatch between LdrEx/StrEx pair in main thread and LdrEx/StrEx pair in the exception code as processor automatically removes the tag hence safely separates them.

But I am a little afraid as

at page 71 (about ClrEx instruction) we have:

''..... ClrEx is useful in exception handler code to force the failure

of the store exclusive if the exception occurs between a load exclusive instruction and the matching store exclusive instruction in a synchronization operation.

..... ''

Hmmm....

So it is necessary to put ClrEx instruction into exception code to remove the tag?

But it was promised (page 32) that the processor do it if an exception occurs...

So how is it?

It is important because ones may have this exception within the compiled library so there is no possibility to add the ClrEx inside.

Thank you for help.

Robert

#ldrex #strex #clrex
1 REPLY 1
carl2399
Associate II
Posted on March 02, 2016 at 02:47

You seem to read the documents, so maybe the following will shed some light:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344h/ch08s05s03.html