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STM32L151 Signals generator with time shift/delay

tamir
Associate
Posted on August 28, 2013 at 16:10

Hi,

I'm trying to generate 3 signal using TIM3&TIM4.

the first signal run at 8MHz, DutyCycle 50%, the second signal should run every odd cycles of the first signal and the third should run every even cycles of the first signal. (see the image below)

0690X000006051DQAQ.png

I've succeeded to generate the first and the second signal, by doing the follow manipulation.

TIM4 (PWM Mode) generate 8MHz at D.C 50%, and set as master trigger to TIM3 so they can be synced together. TIM3 (PWM Mode) set to slave and runs at 4MHz at D.C 25% in order to generate the second signal (TIM3-1).  

but my problem is to generate the third signal (TIM3-2) that need to run on even cycles....

how can I generate the third signal with shifting?

many thanks for the help.

#tim3 #stm32 #timers #pwm #tim4
3 REPLIES 3
Posted on August 28, 2013 at 22:13

I don't see an easy way to do this with two channels on the same timer. Two separate timers I can see just controlling the relative phase.

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tamir
Associate
Posted on September 01, 2013 at 10:41

thanks for the replay,

If I simplified the use, and work with 3 different timers, TIM2 (for signal one) TIM3 (for signal two) TIM4 (for signal three), TIM2 and TIM3 implementations are easy. but still how can I implement the phase on the third signals using TIM4?

Posted on September 01, 2013 at 15:37

Slew TIM4->CNT wrt TIM3->CNT

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