Posted on October 04, 2013 at 09:10Hi,
I am facing problem in SPI master mode configuration. I can't see any response on MISO line (Slave is tested OK).
Here is my SPI initialize functions.
void SPI_init()
{
SPI->CR1 = SPI_CR1_RESET_VALUE; // Reset value
SPI->CR2 = SPI_CR2_RESET_VALUE;
SPI->ICR = SPI_ICR_RESET_VALUE;
SPI->SR = SPI_SR_RESET_VALUE;
SPI->DR = SPI_DR_RESET_VALUE;
SPI->CRCPR = SPI_CRCPR_RESET_VALUE ;
SPI->RXCRCR = SPI_RXCRCR_RESET_VALUE;
SPI->TXCRCR = SPI_TXCRCR_RESET_VALUE;
GPIOC->ODR = 0; // MISO - C7
GPIOC->DDR = 0x60; // SCK - C5
GPIOC->CR1 = 0x60; // MOSI - C6
GPIOC->CR2 = 0x60; // o/p with 10 MHz capacity
SPI->CR1 = 0x3c; // MSB first-250K-master-pol=0-phase=0
SPI->CR2 = 0x03; // SSn is driven by s/w
GPIOD->ODR |= 0x08; // SSn i/o pin=1
}
void spi_transactor (unsigned char wlength, unsigned char rlenght,
const unsigned char *write_data, unsigned char *read_data)
{
unsigned char transaction_length = wlength + rlenght;
unsigned char i;
unsigned char dummy;
unsigned char temp;
GPIOD->ODR &= 0xF7; // SSn = 0
SPI->CR1 |= SPI_CR1_SPE; // SPI enable
for (i=0; i<transaction_length; i++)
{
while(((SPI->SR) & (SPI_SR_TXE)) != 0x02); // Wait until TXE Flag = 1
if(i >= wlength)
SPI->DR = 0x00;
else
SPI->DR = *write_data++;
while(((SPI->SR) & (SPI_SR_RXNE)) != 0x01);
if(i >= wlength)
*read_data++ = SPI->DR;
else
dummy = SPI->DR;
}
while(((SPI->SR) & SPI_SR_BSY) == 0x80);
SPI->CR1 &= ~SPI_CR1_SPE; // SPI Disable
GPIOD->ODR |= 0x08; // SSn=1
}
Using these functions I am sending/receiving data to/from slave. I can see data on MOSI line but not on MISO.
Any suggestions for ''spi_transactor'' definition ???
#spi-master-mode
