How much SRAM does a STM32F4 need?

[Mark Edwards]

Posted on December 16, 2013 at 21:10

This may be one of those how long is a piece of string questions, but any guidance I can get would be much appreciated.

After a fun day of trying to get my head around Scatter Files I finally found an example that gave me an example I could use. But I am wondering how much SRAM the Microcontroller (STM32F429) actually needs, as it seems from the Datasheet that all 192K is used by 3 bit-banding regions. Before reserving 64K the ZI data was 5K which has now increased to 70K. I have run my program and all seems OK, so how much more could I safely use? Thanks Here is the Scatter File Info:

LR_IROM1 0x08000000 0x00200000 { ; load region size_region
ER_IROM1 0x08000000 0x00200000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00030000 { ; RW data
.ANY (+RW +ZI)
}
Buffer1 0x20020000 EMPTY 0x00010000 {} ; Reserved On-Chip SRAM
}

#stm32f4-scatter-file-reserve-ram

[Tesla DeLorean]

Posted on December 16, 2013 at 22:35

Need for What?

I would certainly shrink the allocation from 0x30000 to 0x20000SRAM1 is 112KB, SRAM2 is 16KB, SRAM3 is 64KB, only SRAM1 is mapable at zero, and presumably executing code from.I seem to recall some association between SRAM2 and USB-HS, but can pin that down now, it might relate to contention. 

[Mark Edwards]

Posted on December 16, 2013 at 23:54

Thanks Clive for the reply.

I want the RAM for a frame store, or even better two, not for executing code from. By reducing each byte of a 640X480 RAW RGB image to a binary value I can store the data in 38400 bytes (76800 for two). I have tried increasing Buffer1 to 96K and even that seems to work (on my main CPU) without it crashing (much to my surprise) and I am wondering how much further I can push it. I understand that the answer probably depends on the complexity of the code I am trying to run. The processing load on this CPU will be very light with very small and simple code as it’s main function is driving a FPGA and scanning the bit images as another processor (with SDRAM) handles the full size images. ? I would certainly shrink the allocation from 0x30000 to 0x20000? Does that mean IRAM1 and Buffer1 are separate entities and together need to add up to 192K or is Buffer1 a part of IRAM1 (which I what I thought it was).

[eleventen]

Posted on December 17, 2013 at 00:14I seem to recall some association between SRAM2 and USB-HS, but can pin that down now, it might relate to contention.I believe the trick with the various RAM regions is porting to peripherals and the MCU.  Figure 1 in RM90r4 illustrates this pretty well.  Notice that the CCM is only accessible on the D-bus and SRAM1/SRAM2 are accessible for simultaneous DMA transfers.  

Also, SRAM2 cannot be used for code.

  SRAM2 can be used for executing code, but at a penalty because the S-bus is less efficient than the I-bus for fetching instructions.

[Tesla DeLorean]

Posted on December 17, 2013 at 00:17

The purpose of the Scatter File (Linker Script) is to tell the linker where memory spaces are and how to utilize them. They do not impact the processor, or configure it in any way. You have these areas braced within the IROM definition, in that data targeting them will be stored in FLASH/ROM and copied out at start-up. If you are placing your buffers at hard locations you should shrink the IRAM size so the linker doesn't SEE them or want/expect to use them. Defining IRAM being 0x30000 (192KB) serves no helpful purpose. Observe you haven't defined IRAM2 as the CCM area, nothing untoward happens. Setting up two overlapping areas would seem to set you up for failure, more rigorous linkers might flag such conflicts.

[Mark Edwards]

Posted on December 18, 2013 at 01:45

Oh dear, And there I was thinking I was starting to get a handle on the scatter file.

Thanks Clive, I can see what you are getting at and realise I have lots more reading to do.